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EN
Currently electro-thermal simulations performed with 3D FEM simulators like ANSYS or COMSOL Multiphysics are limited to an imposed current flow through resistive materials. However, in the case of power MOS gated transistors like VDMOS transistors or IGBT, the channel resistance evolves with the gate voltage. This phenomenon is usually neglected in ON-state applications but seems to be determinant in switching application. Furthermore all the MOS cells of the transistors are not at the same temperature. This paper deals with a methodology that could allow taking into account the impact of the gate control and the MOS cells current distribution during 3D FEM electro-thermal simulations.
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