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Content available remote An Accurate DC MOSFET Model for VLSI Simulation
EN
A new accurate, physical, continuous, and simple DC MOSFET model for short-channel devices down to submicron channel lengths is presented in this paper for the simulation of VLSI circuits. The proposed model is based on the Charge-Sheet Approximation (CSA) and describes efficiently the I-V characteristics from subthreshold to strong inversion region as well as from the linear to the saturation region of operation with a single current equation. The model takes into account the major physical effects in state-of-the-art of deep-submicron MOSFET devices such as short and narrow channel effects on threshold voltage, carrier velocity saturation, BIBL, CLM, and mobility reduction due to vertical field. The effect of parasitic source/drain series resistance to the drain current characteristics is explicitly included in the model. The model is physically based, so the continuity of drain current, output conductance, and transconductance is ensured over all [formula], and [formula] bias conditions. Therefore, the model is very suitable for VLSI simulation. The model accuracy is verified by comparison with experimental data for MOSFET with different channel lengths and widths.
EN
A new simple, analytic and physical based charge-capacitance model valid for small-geometry MOSFETs is presented. The proposed charge-capacitance model is developed from the recently published DC MOSFET model [1], which uses a single current equation to describe the I-V characteristics from subthreshold to strong inversion as well as from linear to saturation region of operation. The resulting charge equations are functions of the surface potentials at the source and drain ends. Different channel-partition methods are used for the development of source and drain charge equations. All capacitance are derived from the charges to ensure charge conversation. The resulting capacitances have non-reciprocal property. The model accounts for the major physical effects in state-of-the art of the small-geometry MOSFET devices. A set of benchmark tests for the model continuity has been performed and the benchmark tests requirements are met by the proposed model. Therefore, the proposed model expected to be very suitable for analog applications.
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