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1 International Journal of Microelectronics and Computer Science

1 2018

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Exact parallel critical path fault tracing to speed-up fault simulation in sequential circuits

Kõusaar Jaak, Kostin Sergei, Ubar Raimund, Devadze Sergei, Raik Jaan

International Journal of Microelectronics and Computer Science

2018

Vol. 9, nr 1

9--18

We propose a new method to speed up stuck-at fault simulation for sequential circuits. The method combines exact parallel critical path tracing of faults, used so far only for combinational circuits, with traditional fault simulation in sequential circuits. For that purpose, formulas are developed for classification of faults into two classes: the faults eligible for parallel critical path tracing, and the faults which have to be simulated over the global feedbacks in the circuit by traditional methods. Combining these two approaches in fault simulation ‒ the combinational and sequential simulation concepts ‒ allows dramatic speed-up of fault simulation in sequential circuits, which is demonstrated by experimental results.