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Content available remote Pressure dependence of the band gap energy for the dilute nitride GaNxAs1−x
EN
A model is developed to describe the pressure dependence of the band gap energy for the dilute nitride GaNxAs1-x. It is found that the sublinear pressure dependence of E- is due to the coupling interaction between E+ and E-. We have also found that GaNxAs1-xneeds much larger pressure than GaAs to realize the transition from direct to indirect band gap. It is due to two factors. One is the coupling interaction between the E+ and E-. The other is that the energy difference between the X conduction band minimum (CBM) and the G CBM in GaNxAs1-x is larger than that in GaAs. In addition, we explain the phenomenon that the energy difference between the X CBM and the G CBM in GaNxAs1-xis larger than that in GaAs. It is due to the impurity-host interaction.
EN
A novel zinc porphyrin (5,10,15-tri-dodecoxyphenyl-20-(4-hydroxyphenyl-azo-benzenyl)-porphyrinatozinc (tdhab-ZnP)) with benzenyl-azo-phenolic group, able to adsorb on the nanocrystalline-TiO2 film, has been synthesized. We constructed a dye-sensitized solar cell based on the nanocrystalline-TiO2 hierarchical structure film, with a power conversion efficiency of 4.15 % and a high current density of 14 mA/cm2 under AM 1.5 irradiation. UV-Vis absorption spectra measurements indicated that the tdhab-ZnP molecules formed a charge transfer complex with TiO2 nanoparticles (NPs) through the phenolic group. Cyclic voltammetry measurement showed that the charge separation resulting from the tdhab-ZnP excited singlet state to the conduction band (CB) of TiO2 and charge shifting from the I−/I−3 couple to the porphyrin radical cation were thermodynamically feasible.
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EN
With the improvement of the gate complexity, the verification overhead becomes more decisive for VLSI design cost In order to reduce the simulation time, a adaptive partition based parallel method of VLSI logic simulation with GPGPU is addressed in this paper. The numerous arithmetic blocks of GPGPU is utilized simultaneously for disparate circuit macros. The partition strategy we proposed shows a sufficient flexibility to balance the different work load in parallel threads and fit the feature of GPU architecture. To explore the parallelism and locality of logic simulation further, the circuit macro is organized as stream data. The data dependency between the input and output nets in one individual logical path is handled with the shared memory of GPGPU. As for different logical paths, the dependency is processed by threads synchronization. To illustrate the performance, a serial experiments is implemented in Intel CoreDuo workstation with Nvidia GTX465 GPU board. Four typical digital circuits (LDPC, DES3, OpenRISC 1200 and OpenSPARCPARC T1) are considered as the benchmark. The result of experiments demonstrate a significant speed-up is achieved by using GPGPU parallel method, comparing with the CPU serial logic simulation. In maximal case (OpenS T1), the GPGPU parallel acceleration computes 21 times faster than serial program.
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