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Analysis of Object Location Accuracy for iBeacon Technology based on the RSSI Path Loss Model and Fingerprint Map

Grzechca D. E., Pelczar P., Chruszczyk L.

International Journal of Electronics and Telecommunications

2016

Vol. 62, No. 4

371--378

This paper presents analysis of object location accuracy of a mobile device on the basis of the iBeacon technology. The research starts with radio signal strength indicator analysis along the corridor in order to create a path loss model for iBeacon. Two cases are taken into account: line of sight and non-line of sight for model creation. For both cases two tests: Chi-square, Shapiro-Wilk have been performed. It has also been checked if the HCI (Host Controller Interface) is a source with a memory. Acquired data have been filtered with different type of filters, e.g. median, moving average and then compared. Next, the authors evaluated the indoor positioning trilateration algorithms with the use of created model for exemplary hall. The RSSI map (radiomap) was created and the logarithm propagation model was designed. The logarithmic model estimated distance with average error 1.09m for 1 – 9m and 1.75m for 1-20m and after trilateration, the positions with average error 2.45m was achieved. A statistical analysis for acquiring data led to the final conclusion which enhanced knowledge about positioning based on the popular iBeacon technology.

Finding of optimal excitation signal for testing of analog electronic circuits

Chruszczyk L., Grzechca D., Rutkowski J.

Bulletin of the Polish Academy of Sciences. Technical Sciences

2007

Vol. 55, nr 3

273-280

This article presents combined approach to analog electronic circuits testing by means of evolutionary methods (genetic algorithms) and using some aspects of information theory utilisation and wavelet transformation. Purpose is to find optimal excitation signal, which maximises probability of fault detection and location. This paper fo-cuses on most difficult case where very few (usually only input and output) nodes of integrated circuit under test are available.