Currently electro-thermal simulations performed with 3D FEM simulators like ANSYS or COMSOL Multiphysics are limited to an imposed current flow through resistive materials. However, in the case of power MOS gated transistors like VDMOS transistors or IGBT, the channel resistance evolves with the gate voltage. This phenomenon is usually neglected in ON-state applications but seems to be determinant in switching application. Furthermore all the MOS cells of the transistors are not at the same temperature. This paper deals with a methodology that could allow taking into account the impact of the gate control and the MOS cells current distribution during 3D FEM electro-thermal simulations.
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Aeronautical power electronics applications impose high power density handling and device operation temperatures. SiC technology not being mature enough, the temperature limits of silicon devices must be pushed in order to increase current ranges and the amount of switched power. Device ageing is accelerated and there exist the risk of catastrophic failure by thermal runaway. In order to design correctly high temperature power systems, knowing the IGBT characteristics at extended temperature ranges (-55*C, +175*C) becomes essential. The present work describes an experimental setup and test procedure conceived to experiment with different available IGBT technologies at temperatures above the limits rated by manufacturers. The aim is to generate experimental data for the creation of accurate models with large temperature scale. This will ease prototyping for future development of IGBT modules in aircraft.
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