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Charging Phenomena at the Interface Between High-k Dielectrics and SiOx Interlayers

Engström O., Raeissi B., Piscator J., Mitrovic I. Z., Hall S., Gottlob H. D. B., Schmidt M., Hurley P. K., Cherkaoui K.

Journal of Telecommunications and Information Technology

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2010

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nr 1

10-19

EN

The transition regions of GdSiO/SiOx and HfO2/ SiOx interfaces have been studied with the high-k layers deposited on silicon substrates. The existence of transition regions was verified by medium energy ion scattering (MEIS) data and transmission electron microscopy (TEM). From measurements of thermally stimulated current (TSC), electron states were found in the transition region of the HfO2/SiOx structures, exhibiting instability attributed to the flexible structural molecular network expected to surround the trap volumes. The investigations were focused especially on whether the trap states belong to an agglomeration consisting of a single charge polarity or of a dipole constellation. We found that flat-band voltage shifts of MOS structures, that reach constant values for increasing oxide thickness, cannot be taken as unique evidence for the existence of dipole layers.

2

Rare Earth Silicate Formation: A Route Towards High-k for the 22 nm Node and Beyond

Mitrovic I. Z., Hall S.

Journal of Telecommunications and Information Technology

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2009

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nr 4

51-60

EN

Over the last decade there has been a significant amount of research dedicated to finding a suitable high-k/metal gate stack to replace conventional SiON/poly-Si electrodes. Materials innovations and dedicated engineering work has enabled the transition from research lab to 300 mm production a reality, thereby making high-k/metal gate technology a pathway for continued transistor scaling. In this paper, we will present current status and trends in rare earthbased materials innovations; in particular Gd-based, for the high-k/metal gate technology in the 22 nm node. Key issues and challenges for the 22 nm node and beyond are also highlighted.

3

Review and perspective of high-k dielectrics on silicon

Hall S., Buiu O., Mitrovic I. Z., Lu Y., Davey W. M.

Journal of Telecommunications and Information Technology

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2007

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nr 2

33-43

EN

The paper reviews recent work in the area of high-k dielectrics for application as the gate oxide in advanced MOSFETs. Following a review of relevant dielectric physics, we discuss challenges and issues relating to characterization of the dielectrics, which are compounded by electron trapping phenomena in the microsecond regime. Nearly all practical methods of preparation result in a thin interfacial layer generally of the form SiOx or a mixed oxide between Si and the high-k so that the extraction of the dielectric constant is complicated and values must be qualified by error analysis. The discussion is initially focussed on HfO2 but recognizing the propensity for crystallization of that material at modest temperatures, we discuss and review also, hafnia silicates and aluminates which have the potential for integration into a full CMOS process. The paper is concluded with a perspective on material contenders for the "end of road map" at the 22 nm node.