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1
Content available remote Evolution of Low Drop Out Voltage Regulator in CMOS Technologies
Mustafa N. B., Amin S., Reaz M. B. I., Hashim F. H., Kamal N.
Przegląd Elektrotechniczny
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2015
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R. 91, nr 12
26-33
EN
The demand for low voltage devices has initiated the development of Low Drop Out (LDO) regulator in manifold. This paper presents a review of various LDO frameworks that have been implemented in CMOS technologies and the impact of frameworks related to the parameters of the LDO. The LDO architecture is evaluated through its Power Supply Rejection (PSR) and transient response performance. The transient response performance mostly depends on the added buffer and the PSR performance depends on the pass device capacitance and the LDO loop gain.
PL
W artykule przedstawiono przegląd rozwiązań układów LDO (Low Drop Pout) w technologii CMOS. Przedstawiono także rozwiązania typu PSR – Power Supply Rejection. Analizowano dynamikę tych układów.
2
Content available remote Evolution of IC Switching Voltage Regulator
Rahman L. F., Rong L. M., Reaz M. B. I., Husain H., Marufuzzaman M.
Przegląd Elektrotechniczny
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2015
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R. 91, nr 10
154-160
EN
To satisfy the fast voltage regulation and low input harmonic current distortion, a voltage regulator and a power factor correction (PFC) pre-regulator need to be existed. Cascading the voltage regulator with the PFC pre-regulator is the simplest way to implement the switching voltage regulator. The voltage regulator and PFC pre-regulator is processed the input power for switching regulator serially. The switching regulators efficiency has confirmed deteriorate. The requirement of the harmonic emission has been satisfied by the various types of the non-cascading PFC switching regulators. In this paper, the evolution of the switching regulator and various types of the non-cascading PFC switching regulator is discussed and the design of implementation of different output power levels for two types of non-cascading PFC switching regulator is presented.
PL
Do regulacji napięcia skuteczną metodą jest kaskadowe połączenie regulatorów napięcia I układów korekcji współczynnika mocy PFC. W artykule omówiono ewolucje różnych przełączalnych regulatorów napięcia. Przedstawiono też projekt i zastosowanie dwóch rodzajów regulatorów nie połączonych kaskadowo.
3
Content available remote Low Voltage and Wide Bandwidth Class AB Variable Gain Amplifier in 0.18-μm CMOS Technology
Bhuiyan M. A. S., Idris M. I. B., Reaz M. B. I., Minhad K. N., Husain H.
Przegląd Elektrotechniczny
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2014
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R. 90, nr 6
184--187
EN
Variable gain amplifier (VGA) is the key element for amplifying process in analog to digital converter (ADC). In this paper, a low voltage and wide bandwidth class AB VGA is designed using CEDEC 0.18-μm CMOS process for high speed applications. The result show that, the designed VGA has a wide bandwidth of 100-MHz and consumes power less than 125uW at 1V supply voltage. From the results it is also evident that the circuit is capable of working with high linearity and wide bandwidth. The frequency response (Gain) and the wide bandwidth of this class AB VGA is better than previously reported class AB VGA. Smaller transistors are used to make the chip small and it occupies only 0.003 μm2. Such a VGA is suitable for high-performance RF devices.
PL
W artykule opisano niskonapięciowy, szerokopasmowy wzmacniacz klasy AB typu VGA (variable gain amplifier – wzmacniacz o zmiennym wzmocnieniu). Wzmacniacz zaprojektowano wykorzystując proces 0.18 um CMOS. Wykonano wzmacniacz o pasmie 100 mHz i poborze mocy mniejszym niż 125 uW przy napięciu zasilania 1 V.
4
Content available remote Design and analyses of a low power linear voltage regulator in 0.18μm CMOS process
Amin S., Rong L. M., Reaz M. B. I., Hashim F. H., Kamal N.
Przegląd Elektrotechniczny
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2014
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R. 90, nr 5
201--203
EN
Linear voltage regulator is inevitable in most electronic systems and demands low power and low area. A low dropout (LDO) linear voltage regulator is proposed in this paper by utilizing Current Feedback Amplifier (CFA) technology. The design achieves low power and low area by reducing the internal compensation capacitor and resistors. The simulated result shows that the design consumes only 567.1370pW which is 35% less than the reference circuit. The design also achieves low area and higher gain.
PL
W artykule omówiono liniowy regulator napięcia wykorzystujący koncepcję LDO (low dropout ). Układ wykorzystuje wzmacniacz z prądowym sprzężeniem zwrotnym CFA I technologię CMOS. Zrealizowano układ pobierający o 35% mniej energii niż układy znane z literatury.
5
Content available Design of a nanoswitch in 130 nm CMOS technology for 2.4 GHz wireless terminals
Bhuiyan M. A., Reaz M. B. I., Jalil J., Rahman L. F.
Bulletin of the Polish Academy of Sciences. Technical Sciences
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2014
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Vol. 62, nr 2
399--406
EN
This paper proposes a transmit/receive (T/R) nanoswitch in 130 nm CMOS technology for 2.4 GHz ISM band transceivers. It exhibits 1.03-dB insertion loss, 27.57-dB isolation and a power handling capacity (P1 dB) of 36.2-dBm. It dissipates only 6.87 μW power for 1.8/0 V control voltages and is capable of switching in 416.61 ps. Besides insertion loss and isolation of the nanoswitch is found to vary by 0.1 dB and 0.9 dB, respectively for a temperature change of 125°C. Only the transistor W/L optimization and resistive body floating technique is used for such lucrative performances. Besides absence of bulky inductors and capacitors in the schematic circuit help to attain the smallest chip area of 0.0071 mm2 which is the lowest ever reported in this frequency band. Therefore, simplicity and low chip area of the circuit trim down the cost of fabrication without compromising the performance issue.
6
Content available remote Performance Analysis of Bluetooth Zigbee and Wi-Fi Protocols in 2.4 GHz Multi-standard Zero-IF Receiver
Rahman M. A., Reaz M. B. I., Husain H., Ali M., Marufuzzaman M.
Przegląd Elektrotechniczny
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2013
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R. 89, nr 11
225-228
EN
This paper presents a system-level modeling of a multi-standard receiver, which satisfies Bluetooth, Zigbee and Wi-Fi protocols. An analysis of different wireless receivers suited for multi-standard purposes is performed. The multi-standard Zero-IF receiver was modelled and simulated in MATLAB/SIMULINK environment. The simulation result exhibits better performance of multi-standard wireless receiver for these three protocols. The signal spectrum is verified by simulation model through the receiver for each standard and concluded that Zero-IF is the adequate topology for multi-standard receivers.
PL
Przedstawiono odbiornik pracujący w wielu standardach – ZigBee, Bluetoot i WiFi. Modelowano taki odbiornik i symulowano. Stwierdzono że odbiornik typu zero IF ma najlepsza topologię dla pracy wielostandardowej.
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