Among the numerous solutions developed to improve the voltage handling capability of superjunction power devices, the Deep Trench Termination (DT2) is the most adapted thanks to its lower cost and size compared to other technologies using the multiple epitaxy technique, and an easier implementation in the fabrication process. This paper presents the optimization of the Deep Trench Termination by means of TCAD 2D and 3D-simulations allowing the realization of deep trench superjunction devices (diodes and MOS transistors) for 1200 V applications. The work is focused on the influence of the dielectric passivation layer thickness and the field plate length on the breakdown voltage of a DT-SJDiode.
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Aeronautical power electronics applications impose high power density handling and device operation temperatures. SiC technology not being mature enough, the temperature limits of silicon devices must be pushed in order to increase current ranges and the amount of switched power. Device ageing is accelerated and there exist the risk of catastrophic failure by thermal runaway. In order to design correctly high temperature power systems, knowing the IGBT characteristics at extended temperature ranges (-55*C, +175*C) becomes essential. The present work describes an experimental setup and test procedure conceived to experiment with different available IGBT technologies at temperatures above the limits rated by manufacturers. The aim is to generate experimental data for the creation of accurate models with large temperature scale. This will ease prototyping for future development of IGBT modules in aircraft.
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