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2 2012

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Early Power Estimation of Mixed-Signal Design

Kotynia Ł., Sathyamurthy M., Neumann F., Hennig E.

International Journal of Microelectronics and Computer Science

2012

Vol. 3, nr 4

138-145

In this paper, we present the idea of using dynamic power estimation during the system-level design. A mixed-signal wireless IC with energy harvesting is used as an example of a device where power exploration and optimization plays a key role during the architecture planning. The novelty of this approach lies in introducing the activity profile for the mixed-signal chip as an important indicator of the power consumption that can drive the design phase. The method presented in this paper is based on modeling of the complete chip in order to apply it with a mixed-language Universal Verification Methodology (UVM) environment. It was decided to use the Verilog-D, SystemVerilog and Verilog-AMS languages to represent behavior of the digital and analog/mixed-signal parts of the chip.

Optimisation of the warp yarn tension on a warp knitting machine

Pohlen V., Schnabel A., Neumann F., Gries T.

Autex Research Journal

2012

Vol. 12, no. 2

29--33

Investigations (calculations) based on a warp yarn tension analysis on a warp knitting machine with multiaxial weft yarn insertion allow prospective reduced yarn tension differences in technical warp knits. From this a future opportunity is provided to substitute the subjective warp let-off adjustment by a model of tension control. The outcome of this is a higher reproducibility with associated increasing process reliability and rising product quality.