Tytuł artykułu
Wybrane pełne teksty z tego czasopisma
Identyfikatory
Warianty tytułu
System balansowy kulkowy w czasie rzeczywistym z równoległymi obliczeniami FPG
Języki publikacji
Abstrakty
In this paper, a new PID-regulator based solution to the scientific and practical problem of increasing the accuracy of regulating the position of a ball on a platform in real time is proposed. A transfer function for balancing a ball on a platform is developed. A PID-regulator for balancing a ball on a platform is synthesized. A PID-regulator implementation on FPGA with parallel calculations is designed. An increased accuracy of regulating the position of a ball on a platform is approved by natural simulation.
W artykule uzyskano nowe rozwiązanie rzeczywistego naukowego i praktycznego problemu zwiększania dokładności regulacji pozycji kulkowych na platformie w czasie rzeczywistym za pomocą regulatorów PID. Przy ich realizacji sprzętowej na FPGA z równoległymi obliczeniami przeprowadzono model matematyczny obiektu sterującego oraz opracowano sprzętowy komponent dla FPGA.
Słowa kluczowe
Czasopismo
Rocznik
Tom
Strony
109--117
Opis fizyczny
Bibliogr. 10 poz., fot., wykr., wz., rys.
Twórcy
autor
- Department of Automatic Control and Information Technology, Faculty of Electrical Engineering, Cracow University of Technology
autor
- Department of Automatic Control and Information Technology, Faculty of Electrical Engineering, Cracow University of Technology
autor
- Department of Automation and Control in Technical Systems, National Technical University of Ukraine
autor
- Department of Automation and Control in Technical Systems, National Technical University of Ukraine
autor
- Department of Automation and Control in Technical Systems, National Technical University of Ukraine
Bibliografia
- [1] Trimeche A., Sakly A., Mtibaa A., Benrejeb M., PID Controller Using FPGA Technology, Advances in PID Control, edited by Valery D. Yurkevich, September 6, 2011.
- [2] Somani A., Kokate R., Realization of FPGA Based PID Controller for Speed Control of DC Motor Using Xilinx SysGen, [in:] Satapathy S., Joshi A. (eds.) Information and Communication Technology for Intelligent Systems (ICTIS 2017), Vol. 2, ICTIS 2017, Smart Innovation, Systems and Technologies, Vol. 84., 2018, Springer, Cham, DOI 10.1007/978-3-319-63645-0_9
- [3] Aboelaze M., Shehata M.G., Implementation of multiple PID controllers on FPGA, IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 6–9 Dec. 2015, Cairo, Egypt, 2015, 446–449.
- [4] Krasňanský R., Dvorščák B., Kozák S., Hardware Realization of Embedded Control Algorithm on FPGA, COMPUTATION TOOLS 2014, The Fifth International Conference on Computational Logics, Algebras, Programming, Tools, and Benchmarking, 2014, 13–18.
- [5] Wei Zhao, Byung Hwa Kim, Larson A.C, Voyles R.M., FPGA Implementation of Closed-Loop Control System for Small-Scale Robot, ICAR ‘05, Proceedings 12th International Conference on Advanced Robotics, 2005, 70–77.
- [6] Chang Y.F., Moallem M., Wang W., Efficient implementation of PID control algorithm using FPGA technology, Proceedings of 43 IEEE Conference on Decision and Control, vol. 5, Dec. 2004, 4885–4890.
- [7] Krasňanský R., Dvorščák B., Design and Implementation of FPGA-based PID controller, [in:] ACCS’13: 3rd International Conference on Advanced Control Circuits and Systems, ERI, Luxor, Dec. 2013, 43.
- [8] Aboelaze M., Shehata M.G., Implementation of multiple PID controllers on FPGA, Electronics Circuits and Systems (ICECS) 2015 IEEE International Conference, 2015, 446–449.
- [9] Kravets P.I., Shymkovych V.M., Fedorchuk V.V., Goy A.A., Neural controller stability of moving object with the hardware and software realization on FPGA,Visnyk NTUU ‘KPI’ Informatics, operation and computer systems, №63, 2015, 4–11.
- [10] Kravets P.I., Shymkovych V.M., Samotyy V., Method and technology of synthesis of neural network models of object control with their hardware implementation on FPGA, 2017 9th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), Bucharest 2017, 947-951, DOI: 10.1109/IDAACS.2017.8095226.
Uwagi
EN
Section "Electrical Engineering"
PL
Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-ffa857f8-0147-4259-81a8-441d6846a6c6