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Tytuł artykułu

Design Optimization of QFP Structure for over 8Gbps Package Applications

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Wybrane pełne teksty z tego czasopisma
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Warianty tytułu
PL
Optymalizacja struktury QFP dla aplikacji o prędkości transmisji ponad 8Mbps
Języki publikacji
EN
Abstrakty
EN
A 8Gbps packaging solution that uses low-cost quad flat pack (QFP) technology is presented. Since such a high speed is beyond the reach of traditional QFP package structure, a new design methodology with coplanar transmission line structure built into the lead frame has been developed. Due to the complexity level in QFP structure, each interconnect segment is accurately modelled in 3D model by utilizing the industry leading advance software tool, ANSYS HFSS. S-parameter, Time Domain Reflectometry (TDR) and Eye Diagram are used to help in understanding the contributing to the optimized QFP structure. The analysis results indicate that the optimized QFP structure can successfully achieve over 8Gbps single-end signal transmission.
PL
W artykule przedstawiono metodę zmiany struktury QFP na potrzeby przesyłu z prędkością 8Gbps. W celu analizy działania, stworzono model struktury o bardzo wysokiej precyzji, przy wykorzystaniu programów ANSYS HFSS. S-parameter, Time Domain Reflectometry (TDR) oraz Eye Diagram. Analiza wyników badań wykazuje, że wprowadzona optymalizacja pozwala na osiągnięcie założonej prędkości przesyłu danych.
Rocznik
Strony
284--289
Opis fizyczny
Bibliogr. 16 poz., rys., tab., wykr.
Twórcy
autor
  • National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 People’s Republic of China
  • Jiangsu Provincial Key Lab of ASIC Design, Nantong University, Nantong 226019, People’s Republic of China
autor
  • National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 People’s Republic of China
autor
  • National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 People’s Republic of China
autor
  • National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 People’s Republic of China
autor
  • Jiangsu Provincial Key Lab of ASIC Design, Nantong University, Nantong 226019, People’s Republic of China
Bibliografia
  • [1] Hirose, T, "High-Frequency IC Packaging Technologies”, IEEE Indium Phosphide and Related Materials, May. 2003, 227 - 230.
  • [2] Tzyy-Sheng Horng; Sung-Mao Wu; Hui-Hsiang Huang; Chi- Tsung Chiu; Chih-Pin Hung, “Modeling of lead-frame plastic CSPs for accurate prediction of their low-pass filter effects on RFICs,” IEEE Transactions on Microwave Theory and Techniques, Vol. 49, No. 9, 2001, 1538-1545.
  • [3] Lawrence Larson, Darryl Jessie, "Advances in RF Packaging Technologies for Next-Generation Wireless Communications Applications", IEEE Custom Integrated Circuits Conference, 2003, 323-330
  • [4] Haiyan Sun, Jianhui Wu, Ling Sun, Weiping Jing, “Optimization Design of a 64-Lead Low-Profile Quad Flat Package for RFIC Applications,” 11th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPTHDP), August 2010, 499 – 502
  • [5] Joong-Ho Kim, Ralf Schmitt, Dan Oh, Wendemagegnehu T. Beyene, Ming Li, Arun Vaidyanath, Yi Lu, June Feng, Chuck Yuan, Dave Secker, Don Mullen, "Design of Low Cost QFP Packages for Multi-Gigabit Memory Interface," Electronic Components and Technology Conference, 2009, 1662-1669
  • [6] Joong-Ho Kim, Ralf Schmitt, Dan Oh, Wendem Beyene, Ming Li, Arun Vaidyanath, June Feng, Chuck Yuan, “Feasibility Study of a 3.2Gb/s Memory Interface in Ultra Low-Cost LQFP Packages”, DesignCon 2009, Santa Clara, 2009.
  • [7] Darryl Jessie, Lawrence Larson, "An Improved Leaded Small Outline Package and Equivalent Circuit," IEEE microwave and wireless components letters, Vol. 13, No. 7, July 2003, 273-275
  • [8] Umberto Paoletti, Takashi Hisakado, Osami Wada, "Quasi- Static Lumped Element Stand-Alone Package Model for Quad Flat Package," Electrical Design of Advanced Packaging and Systems Symposium, 2008, 57-60
  • [9] J. Svacina, “A simple quasi-static determination of basic parameters of multilayer microstrip and coplanar waveguide,” IEEE Microwave and Guided Wave Letters, Vol. 2, No. 10, pp. 382-387, October. 1992.
  • [10] S. S. Bedair, I. Wolff, “Fast, accurate and simple approximate analytic formulas for calculating the parameters of supported coplanar waveguides for MMIC's,” IEEE Trans. on Microwave Theory and Techniques, Vol. 40, No. 1, 1992, 41-48.
  • [11] J. Ke, C. H. Chen, “Dispersion and attenuation characteristics of coplanar waveguides with finite metallization thickness and conductivity,” IEEE Trans. on Microwave Theory and Techniques, Vol. 43, No. 5, 1995, 1128-1135.
  • [12] D. Jessie, L. Larson, "Conformal mapping for buried CPW with finite grounds," Electronics Letters, Vol. 37, No. 25, December 2001, 1521-1523.
  • [13] Haiyan Sun, Jianhui Wu, Ling Sun, Weiping Jing, “Modeling and Design of Coplanar Structure in QFP Package for RFIC Applications,” 12th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPTHDP), August 2011, 573 – 576.
  • [14] Beh Jiun Kai, Lee Chan Kim, "High Speed Interface Wirebond Modeling Division Methodology," Electronic Materials and Packaging, December 2006, 1-5.
  • [15] Zhaowen YAN, Yansheng WANG, Mingming CHE, Yajing HAN, Tao WANG, Toyobur RAHMAN, "A Novel Design of Electromagnetic Bandgap Structure and its Effects on PI and SI," Przegląd Elektrotechniczny, No. 5, March 2012, 73-77.
  • [16] Ryan D. McBride, Steven G. Rosser, and Ronald P. Nowak, "Modeling and Simulation of 12.5 Gbps on a HyperBGA Package," Electronics Manufacturing Technology Symposium, July 2003, 143-147.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-fecc0d3c-c007-42d5-bec5-0b7bad9fe88c
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