High resolution time-interval measurement systems applied to flow measurement

• Autorzy: Grzelak S. , Kowalski M. , Czoków J. , Zieliński M.

Identyfikatory

DOI

10.2478/mms-2014-0008

• Języki publikacji: EN

Abstrakty

EN

The designing process of high resolution time interval measurement systems creates many problems that need to be eliminated. The problems are: the latch error, the nonlinearity conversion, the different duty cycle coefficient of the clock signal, and the clock signal jitter. Factors listed above affect the result of measurement. The FPGA (Field Programmable Gate Array) structure also imposes some restrictions, especially when a tapped delay line is constructed. The article describes the high resolution time-to-digital converter, implemented in a FPGA structure, and the types of errors that appear there. The method of minimization and processing of data to reduce the influence of errors on the measurement is also described.

Słowa kluczowe

EN

FPGA; time-to-digital converter; multi-segment delay line; carry chain

• Wydawca: Komitet Metrologii i Aparatury Naukowej PAN
• Czasopismo: Metrology and Measurement Systems
• Rocznik: 2014
• Tom: Vol. 21, nr 1
• Strony: 77--84
• Opis fizyczny: Bibliogr. 10 poz., rys., wykr., wzory

Twórcy

autor

Grzelak S.

• Institute of Physics, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University, Grudziadzka 5, 87-100 Torun, Poland

autor

Kowalski M.

• Institute of Physics, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University, Grudziadzka 5, 87-100 Torun, Poland

autor

Czoków J.

• Institute of Physics, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University, Grudziadzka 5, 87-100 Torun, Poland

autor

Zieliński M.

• Institute of Physics, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University, Grudziadzka 5, 87-100 Torun, Poland

Bibliografia

• [1] Kalisz, J. (2004). Review of methods for time interval measurements with picoseconds resolution. Metrologia. Nr 41, 17-32.
• [2] Song, J., An, Q., Liu, S. (2006). A High-Resolution Time-to-Digital Converter Implemented in Field-Programmable-Gate-Arrays. IEEE Trans. On Nucl. Sci., 53(1), 236-241.
• [3] Zieliński, M. (2009). Review of single-stage time-interval measurement modules implemented in FPGA devices. Metrology and Measurement Systems, 16(4), 641-647.
• [4] Zieliński, M., Chaberski, D., Grzelak, S. (2003). Time-interval measuring modules with short deadtime. Metrology and Measurement Systems, 10(3), 241-251.
• [5] Zieliński, M., Chaberski, D., Kowalski, M., Frankowski, R., Grzelak, S. (2004). High-resolution time-interval measuring system implemented in single FPGA device. Measurement, 35(3), 311-317.
• [6] Mantyniemi, A., Rahkonen, T., Kostamovaara, J. (2009). A cmos time-to-digital converter (tdc) based on a cyclic time domain successive approximation interpolation method. IEEE Journal of Solid-State Circuits. 44(11), 3067-3078.
• [7] Poki, Ch., Kai-Ming, W., Chuan-Yuan, Li, Po-Yu, Ch., Juan-Shan, L., Cheng-Wei, Liu. (24-26 June 2011). CMOS time-to-digital converter with low PVT sensitivity 20.8 ps resolution and −0.25∼0.22 LSBc inaccuracy. IEEE International Conference on Anti-Counterfeiting, Security and Identification (ASID). 127-130.
• [8] http://www.xilinx.com/ [as of Oct. 2012].
• [9] Zieliński, M., Kowalski, M., Frankowski, R., Chaberski, D., Grzelak, S., Wydźgowski, L. (2009 Accumulated jitter measurement of standard clock oscillators, Metrology and Measurement Systems 16(2), 259-266.
• [10] Grzelak, S., Czoków, J., Kowalski, M., Zieliński, M. (2012). Ultrasonic flow measurement with high= resolution. Metrol. Meas. Syst. 21(2).

Uwagi

EN

This work was supported by the Polish National Science Centre (NCN) Grant No N N505484540