Cascode amplifiers with low-gain variability and gain enhancement using a body-biasing technique

• Autorzy: Pereira N , Oliveira L. B. , Goes J. , Oliveira J. P.
• Języki publikacji: EN

Abstrakty

EN

This paper presents a simple circuit technique to reduce gain variability with PVT variations in cascode amplifiers using a body-biasing scheme, while enhancing the overall gain of the amplifier. Simulation results of a standard telescopic-cascode amplifier, in two different nanoscale CMOS technologies (130 nm and 65 nm) show that the proposed compensated circuit amplifier exhibits a (DC) gain variability smaller (below ± 0.5 dB) than the original (uncompensated) circuit, while reaching a gain enhancement of about 3 dB. The required auxiliary biasing circuit dissipates around 5% of the main amplifier circuit.

Słowa kluczowe

EN

amplifier; body-biasing; cascode; CMOS analog circuits; PVT compensation

PL

wzmacniacz; kaskoda; układy analogowe CMOS; kompensacja PVT

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2013
• Tom: Vol. 4, nr 3
• Strony: 98--102
• Opis fizyczny: Bibliogr. 7 poz.

Twórcy

autor

Pereira N

• Department of Electrical Engineering, Faculty of Sciences and Technology, New University of Lisbon, 2829-516 Caparica, Portugal
• Center of Technology and Systems (CTS-UNINOVA), New University of Lisbon, 2829-516 Caparica, Portugal

autor

Oliveira L. B.

• Department of Electrical Engineering, Faculty of Sciences and Technology, New University of Lisbon, 2829-516 Caparica, Portugal
• Center of Technology and Systems (CTS-UNINOVA), New University of Lisbon, 2829-516 Caparica, Portugal
• INESC-ID, 1029 Lisbon, Portugal

autor

Goes J.

• Department of Electrical Engineering, Faculty of Sciences and Technology, New University of Lisbon, 2829-516 Caparica, Portugal
• Center of Technology and Systems (CTS-UNINOVA), New University of Lisbon, 2829-516 Caparica, Portugal
• S3-Group, Madan Parque, Rua dos Inventores, 2825-182 Caparica, Portugal

autor

Oliveira J. P.

• Department of Electrical Engineering, Faculty of Sciences and Technology, New University of Lisbon, 2829-516 Caparica, Portugal
• Center of Technology and Systems (CTS-UNINOVA), New University of Lisbon, 2829-516 Caparica, Portugal

Bibliografia

• [1] J.P. Oliveira, J. Goes, Parametric Analog Signal Amplification Applied to Nanoscale CMOS Technologies, 201thh ed. Springer, 2012.
• [2] Pekarik, 1.; Greenberg, D.; Jagannathan, B.; Groves, R.; Jones, J.R.; Singh, R.; Chinthakindi, A.; Wang, X.; Breitwisch, M.; Coolbaugh, D.; Cottrell, P.; Florkey, J.; Freeman, G.; Krishnasamy, R.; "RF CMOS technology from 0.25μm to 65nm: the state of the art," Proc. of the IEEE Custom Integrated Circuits Conf, pp. 217- 224, Oct. 2004.
• [3] N.H.E. Weste e K. Eshraghian, Principles of CMOS VLSI Design, 2nd ed. Addison Wesley, 1994.
• [4] T.C. Carusone, D. A. Johns, K. W. Martin, Analog Integrated Circuit Design, 2nd ed. Wiley, 2011.
• [5] B. Razavi, Design of Analog CMOS Integrated Circuits, 1st ed. McGraw-Hill Science/Engineering/Math, 2000.
• [6] N. Pereira, L.B. Oliveira, J. Goes, and J. Oliveira, “Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation”, in Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference, 2013, pp 209-212.
• [7] N. Pereira, L.B. Oliveira, and J. Goes, “Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique”, in Technological Innovation for the Internet of Things, L. M. Camarinha-Matos, S. Tomic, and P. Graca, Eds Springer Berlin Heidelberg, 2013, pp 590-599.