Experimental research of the analog multiplier based on field-effect transistors

• Autorzy: Kurytnik I. P. , Kucheruk V. , Kulakov P. , Vasilevskyi O.

Identyfikatory

DOI

10.15199/48.2017.11.39

Warianty tytułu

PL

Badania eksperymentalne mnożnika analogowego sygnałów na podstawie tranzystorów polowych

• Języki publikacji: EN

Abstrakty

EN

The article presents the results of mathematical analysis and experimental studies of analog multiplier based on field-effect transistors. It is established that such multiplier has a wider dynamic range of input signals and a low level of output signal combinational components.

PL

Artykuł prezentuje wyniki analizy matematycznej i doświadczeń eksperymentalnych mnożnika analogowego opartego na tranzystorach polowych. Ustalono, że taki mnożnik posiada szerszy zakres dynamicznych sygnałów wejściowych i niski poziom składowych kombinowanych sygnałów wyjściowych.

Słowa kluczowe

EN

analog multiplier; field-effect transistor; combinational components

PL

wzmacniacz sygnału analogowego; tranzystor polowy; komponenty kombinowane

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2017
• Tom: R. 93, nr 11
• Strony: 190--193
• Opis fizyczny: Bibliogr. 20 poz., rys.

Twórcy

autor

Kurytnik I. P.

• State Higher School in Oswiecim

autor

Kucheruk V.

• Department of Metrology and Industrial Automation, Vinnytsia National Technical University, Ukraine

autor

Kulakov P.

• Department of Metrology and Industrial Automation, Vinnytsia National Technical University, Ukraine

autor

Vasilevskyi O.

• Department of Metrology and Industrial Automation, Vinnytsia National Technical University, Ukraine

Bibliografia

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• [5] Babanezhad, J. N. A 20-V four-quadrant CMOS analog multiplier / J. N. Babanezhad, G. C. Temes // IEEE J. Solid-State Circuits, vol. SC-20, no. 6, pp. 1158–1168, December, 1985.
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• [11] Song, H. G. A MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers / H. G. Song, C. K. Kim // IEEE J. Solid-State Circuits, vol. 25, no. 3, pp. 841–848, June 1990.
• [12] Kim, C. W. Design and implementation of a new four quadrant MOS analog multiplier / C. W. Kim, S. B. Park // Analog Integrated Circuits and Signal Processing, vol. 2, pp. 95–103, 1992.
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• [14] Keles, S. Four quadrant FGMOS analog multiplier / Keles S., Kuntman H. // Turkish Journal of Electrical Engineering and Computer Sciences.- 2011.-Vol. 19, No.2. - p. 291 – 301.
• [15] Tietze, U. Semiconductor circuitry Reference Guide. Trans. from ger. / U. Tietze, C. Schenk. - M .: Mir, 1982. - 512 p.
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• [18] Timonteev, V. N. Analog multipliers of signals in electronic equipment / Timonteev V. N., Velichko L. M., Tkachenko V. A. - M .: Radio and Communications, 1982. - 112 p.
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• [20] Digitron Semiconductors / Digitron Semiconductors. – Access mode : http: // http://www.digitroncorp.com/ Documents/Datasheets/ MFE120-MFE122.aspx?ext=.pdf

Uwagi

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).