VHDL-Ams Model of the Integrated Membrane Micro-Accelerometer with Delta-Sigma (Δσ) Analog-To-Digital Converter for Schematic Design Level

• Autorzy: Golovatyj А. , Teslyuk V. , Kryvyy R.
• Języki publikacji: EN

Abstrakty

EN

VHDL-Ams model of integrated membrane type micro-accelerometer with delta-sigma (ΔΣ) analog-to-digital converter for schematic design level was developed. It allows simulating movement of the sensitive element working weigh from the applied acceleration, differential capacitor and original signal capacity change, signal digitizing with the help of DeltaSigma ADC with defined micro-accelerometer structural parameters, and analyzze an integrated device at the schemotechnical design level.

Słowa kluczowe

EN

Micro-Electro-Mechanical Systems (MEMS); micromechanical sensitive element; integrated membrane micro-accelerometer; delta-sigma modulation; pulse width modulation (PWM); delta-sigma analog-todigital converter (ADC); one bit digital-to-analog converter (DAC); VHDL-AMS hardware description language; hAMSter software; schemotechnical design level

• Wydawca: Polish Academy of Sciences, Branch in Lublin
• Czasopismo: ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
• Rocznik: 2015
• Tom: Vol. 4, No 2
• Strony: 65--70
• Opis fizyczny: Bibliogr. 29 poz., rys., wykr.

Twórcy

autor

Golovatyj А.

• Ternopil Technical National University of Ivan Polyuj,

autor

Teslyuk V.

• Lviv Polytechnic National University

autor

Kryvyy R.

• Lviv Polytechnic National University

Bibliografia

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