Layout Optimizations of Operational Amplifiers in Deep Submicron

• Autorzy: Shi Jun

Identyfikatory

DOI

10.24425/ijet.2020.131876

• Języki publikacji: EN

Abstrakty

EN

Operational amplifies (op amps) are an integral part of many analog and mixed-signal systems. Op amps with vastly different levels of complexity are used to realize functions ranging from DC bias generation to high-speed amplification or filtering. The design of op amps continues to pose a challenge as the supply voltage and transistor channel lengths scale down with each generation of CMOS technologies. The thesis deals with the analysis, design and layout optimization of CMOS op amps in deep Submicron (DSM) from a study case. Finally, layout optimizations of op amps will be given, in which propose optimization techniques to mitigate these DSM effects in the place-and-route stage of VLSI physical design.

Słowa kluczowe

EN

layout optimization; deep submicron; DSM; operational amplifier; place-and-route

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2020
• Tom: Vol. 66, No. 2
• Strony: 287--293
• Opis fizyczny: Bibliogr. 15 poz., il., rys., tab.

Twórcy

autor

Shi Jun

• Faculty of Dep. Electrical Engineering of Mechanical & Electronics College, Shanghai JianQiao University, Shanghai, P.R. China

Bibliografia

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Uwagi

Opracowanie rekordu ze środków MNiSW, umowa Nr 461252 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2020).