Lightweight PUF-Based Gate Replacement Technique to Reduce Leakage of Information through Power Profile Analysis

• Autorzy: Mohankumar N. , Jayakumar M. , Nirmala Devi M.

Identyfikatory

DOI

10.24425/ijet.2022.143881

• Języki publikacji: EN

Abstrakty

EN

The major challenge faced by electronic device designers is to defend the system from attackers and malicious modules called Hardware Trojans and to deliver a secured design. Although there are many cryptographic preventive measures in place adversaries find different ways to attack the device. Differential Power Analysis (DPA) attack is a type of Side Channel Attacks, used by an attacker to analyze the power leakage in the circuit, through which the functionality of the circuit is extracted. To overcome this, a lightweight approach is proposed in this paper using, Wave Dynamic Differential Logic (WDDL) technique, without incurring any additional resource cost and power. The primary objective of WDDL is to make the power consumption constant of an entire circuit by restricting the leakage power. The alternate strategy used by an adversary is to leak the information through reverse engineering. The proposed work avoids this by using a bit sequencer and a modified butterfly PUF based randomizing architecture. A modified version of butterfly PUF is also proposed in this paper, and from various qualitative tests performed it is evident that this PUF can prevent information leakage. This work is validated on ISCAS 85, ISCAS 89 benchmark circuits and the results obtained indicate that the difference in leakage power is found to be very marginal.

Słowa kluczowe

EN

Design for Security; Hardware Security; PUF; TRNG; Wave Dynamic Differential Logic

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2022
• Tom: Vol. 68. No. 4
• Strony: 749--754
• Opis fizyczny: Bibliogr. 22 poz., rys., wykr.

Twórcy

autor

Mohankumar N.

• Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore, Amrita Vishwa, Vidyapeetham, India

autor

Jayakumar M.

• Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore, Amrita Vishwa, Vidyapeetham, India

autor

Nirmala Devi M.

• Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore, Amrita Vishwa, Vidyapeetham, India

Bibliografia

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Uwagi

Opracowanie rekordu ze środków MEiN, umowa nr SONP/SP/546092/2022 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2022-2023).