CMOS implementation of an analogue median filter for image processing in real time

• Autorzy: Jendernalik W. , Jakusz J. , Blakiewicz G. , Szczepański S.
• Języki publikacji: EN

Abstrakty

EN

An analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of analogue pre-processors, and interface circuits. The analysis of the main parameters of the considered median filter is presented. The discussion of important limitations in the operation of the filter due to the restrictions imposed by CMOS technology is also presented.

Słowa kluczowe

EN

analogue CMOS circuits; early vision processing; median filter; low-power

• Wydawca: Polska Akademia Nauk, Wydział IV Nauk Technicznych
• Czasopismo: Bulletin of the Polish Academy of Sciences. Technical Sciences
• Rocznik: 2013
• Tom: Vol. 61, nr 3
• Strony: 725--730
• Opis fizyczny: Bibliogr. 25 poz., wykr., rys., fot., tab.

Twórcy

autor

Jendernalik W.

• Department of Microelectronic Systems, Gdańsk University of Technology, 11/12 Narutowicza St., 80-952 Gdańsk, Poland

autor

Jakusz J.

• Department of Microelectronic Systems, Gdańsk University of Technology, 11/12 Narutowicza St., 80-952 Gdańsk, Poland

autor

Blakiewicz G.

• Department of Microelectronic Systems, Gdańsk University of Technology, 11/12 Narutowicza St., 80-952 Gdańsk, Poland

autor

Szczepański S.

• Department of Microelectronic Systems, Gdańsk University of Technology, 11/12 Narutowicza St., 80-952 Gdańsk, Poland

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