Reduced components count with optimal switching for minimum THD in multilevel inverter

• Autorzy: Hussein Taha Ahmad , DahamanIshak DahamanIshak , Tarnini Mohamad

Identyfikatory

DOI

10.15199/48.2024.03.27

Warianty tytułu

PL

Zmniejszona liczba komponentów przy optymalnym przełączaniu zapewniającym minimalne THD w falowniku wielopoziomowym

• Języki publikacji: EN

Abstrakty

EN

This paper presents the design and implementation of a 31 multi-level inverter (31-MLI) suitable for medium and high-power industrial applications. The research considers the reduction of the components in the switches and the DC sources used, as well as the reduction of the total harmonics distortion (THD) at the output voltage by selective harmonics elimination (SHE). For this purpose, three efficient algorithms are used to determine the optimum values of switching angles. Those algorithms are genetic algorithm_(GA), gray wolf optimization _(GWO) and slime mold algorithm_ (SMA). The switching angles that give the lowest value of THD were selected from each algorithm and tabulated for a wide range of modulation index (m), and named the integrated hybrid optimizer (IHO). A reduced switches model of 31-MLI is built, controlled by Arduino, and programmed with the selected optimized angles. A comparison study is carried out for all optimized cases. To validate the effectiveness of the proposed IHO, a 31-MLI is modeled in MATLAB Simulink environment. An experimental prototype was also built and tested. Comprehensive results from both simulation and experiment are analyzed and compared under different operating conditions. The results show the proposed IHO can achieve minimum THD in a 31-MLI.

PL

W artykule przedstawiono projekt i realizację wielopoziomowego falownika 31 (31-MLI) odpowiedniego do zastosowań przemysłowych średniej i dużej mocy. Badania uwzględniają redukcję komponentów stosowanych w przełącznikach i źródłach prądu stałego, a także redukcję całkowitego zniekształcenia harmonicznych (THD) napięcia wyjściowego poprzez selektywną eliminację harmonicznych (SHE). W tym celu stosuje się trzy wydajne algorytmy wyznaczające optymalne wartości kątów przełączania. Algorytmy te to algorytm genetyczny_(GA), optymalizacja szarego wilka_(GWO) i algorytm śluzowca_ (SMA). Z każdego algorytmu wybrano kąty przełączania, które dają najniższą wartość THD, zestawiono w tabeli dla szerokiego zakresu współczynnika modulacji (m) i nazwano zintegrowanym optymalizatorem hybrydowym (IHO). Zbudowany jest zredukowany model przełączników 31-MLI, kontrolowany przez Arduino i programowany pod wybranymi zoptymalizowanymi kątami. Dla wszystkich zoptymalizowanych przypadków przeprowadzane jest badanie porównawcze. Aby zweryfikować skuteczność proponowanej IHO, model 31-MLI jest modelowany w środowisku MATLAB Simulink. Zbudowano i przetestowano także eksperymentalny prototyp. Kompleksowe wyniki symulacji i eksperymentów są analizowane i porównywane w różnych warunkach operacyjnych. Wyniki pokazują, że proponowana IHO może osiągnąć minimalne THD w 31-MLI.

Słowa kluczowe

EN

multilevel inverter; MLI; GA; GWO; SMA

PL

falownik wielopoziomowy; GA; GWO; MLI; SWA

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2024
• Tom: R. 100, nr 3
• Strony: 149--156
• Opis fizyczny: Bibliogr. 37 poz., rys., tab.

Twórcy

autor

Hussein Taha Ahmad

• Northern Technical University, Mosul, Iraq

• https://orcid.org/0000-0001-9516-6860

autor

DahamanIshak DahamanIshak

• Universiti Sains Malaysia, Penang, Malaysia

• https://orcid.org/0000-0001-9363-6339

autor

Tarnini Mohamad

• Beirut Arab university , USM offshore center, Türkiye

• https://orcid.org/0000-0001-7726-4598

Bibliografia

• [1] H. Akagi, "Multilevel Converters: Fundamental Circuits and Systems," in Proceedings of the IEEE, vol. 105, no. 11, pp. 2048-2065, Nov. 2017, doi: 10.1109/JPROC.2017.2682105.
• [2] M. A. Perez, S. Ceballos, G. Konstantinou, J. Pou and R. P. Aguilera, "Modular Multilevel Converters: Recent Achievements and Challenges," in IEEE Open Journal of the Industrial Electronics Society, vol. 2, pp. 224-239, 2021, doi: 10.1109/OJIES.2021.3060791.
• [3] E. Babaei, C. Buccella and M. Saeedifard, "Recent Advances in Multilevel Inverters and Their Applications—Part I," in IEEE Transactions on Industrial Electronics, vol. 63, no. 11, pp. 7145- 7147, Nov. 2016, doi: 10.1109/TIE.2016.2602270.
• [4] M. Norambuena, S. Kouro, S. Dieckerhoff and J. Rodriguez, "Reduced Multilevel Converter: A Novel Multilevel Converter With a Reduced Number of Active Switches," in IEEE Transactions on Industrial Electronics, vol. 65, no. 5, pp. 3636- 3645, May 2018, doi: 10.1109/TIE.2017.2762628.
• [5] C. Newton and M. Summer, "Multi-level convertors a real solution to medium/high-voltage drives," in Power Engineering Journal, vol. 12, no. 1, pp. 21-26, Feb. 1998, doi: 10.1049/pe:19980107.
• [6] J. I. Leon, S. Vazquez and L. G. Franquelo, "Multilevel Converters: Control and Modulation Techniques for Their Operation and Industrial Applications," in Proceedings of the IEEE, vol. 105, no. 11, pp. 2066-2081, Nov. 2017, doi: 10.1109/JPROC.2017.2726583.
• [7] M. Asoodar, M. Nahalparvari, C. Danielsson, R. Söderström and H. -P. Nee, "Online Health Monitoring of DC-Link Capacitors in Modular Multilevel Converters for FACTS and HVDC Applications," in IEEE Transactions on Power Electronics, vol. 36, no. 12, pp. 13489-13503, Dec. 2021, doi: 10.1109/TPEL.2021.3091780.
• [8] Pasquale Franzese, Mattia Ribera, Andrea Cervone, Diego Iannuzzi, "Optimized control strategy for single-phase multilevel cascaded converter in a distributed PV-BESS system," Electric Power Systems Research, Volume 214, Part A,2023.
• [9] C. Dhanamjayulu, S. Padmanaban, V. K. Ramachandaramurthy, J. B. Holm-Nielsen and F. Blaabjerg, "Design and Implementation of Multilevel Inverters for Electric Vehicles," in IEEE Access, vol. 9, pp. 317-338, 2021, doi: 10.1109/ACCESS.2020.3046493.
• [10] A. K. Koshti and M. N. Rao, "A brief review on multilevel inverter topologies," 2017 International Conference on Data Management, Analytics and Innovation (ICDMAI), Pune, India, 2017, pp. 187-193, doi: 10.1109/ICDMAI.2017.8073508.
• [11] A. Mokhberdoran and A. Ajami, "Symmetric and Asymmetric Design and Implementation of New Cascaded Multilevel Inverter Topology," in IEEE Transactions on Power Electronics, vol. 29, no. 12, pp. 6712-6724, Dec. 2014, doi: 10.1109/TPEL.2014.2302873.
• [12] Soumyadeep Ray, Nitin Gupta & Ram AvtaGupta "A Comprehensive Review on Cascaded H-bridge Inverter-Based Large-Scale Grid-Connected Photovoltaic," IETETechnicalReview, 34:5, 463477, 2017,DOI: 10.1080/02564602.2016.1202792
• [13] Alepuz, Salvador, Sergio Busquets-Monge, Joan Nicolás-Apruzzese, Àlber Filbà-Martínez, Josep Bordonau, Xibo Yuan, and Samir Kouro. 2022. "A Survey on Capacitor Voltage Control in Neutral-Point-Clamped Multilevel Converters" Electronics 11, no.4:527. doi.org/10.3390/electronics1104052
• [14] H. Obara and Y. Sato, "Theoretical analysis of self-balancing function of capacitor voltages in flying capacitor multi-level converters," 2011 IEEE Energy Conversion Congress and Exposition, Phoenix, AZ, USA, 2011, pp. 2079-2086, doi: 10.1109/ECCE.2011.6064043.
• [15] Balal, Afshin, et al. "A review on multilevel inverter topologies." Emerging Science Journal 6.1 (2022): 185-200.
• [16] H. P. Vemuganti, D. Sreenivasarao, S. K. Ganjikunta, H. M. Suryawanshi and H. Abu-Rub, "A Survey on Reduced Switch Count Multilevel Inverters," in IEEE Open Journal of the Industrial Electronics Society, vol. 2, pp. 80-111, 2021, doi: 10.1109/OJIES.2021.3050214.
• [17] M. D. Siddique, S. Mekhilef, N. M. Shah and M. A. Memon, "Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count," in IEEE Access, vol. 7, pp. 24498-24510, 2019, doi: 10.1109/ACCESS.2019.2890872.
• [18] K. P. Panda, P. R. Bana, O. Kiselychnyk, J. Wang and G. Panda, "A Single-Source Switched-Capacitor-Based Step-Up Multilevel Inverter With Reduced Components," in IEEE Transactions on Industry Applications, vol. 57, no. 4, pp. 3801- 3811, July-Aug. 2021, doi: 10.1109/TIA.2021.3068076.
• [19] K. -R. Sorto-Ventura, M. Abarzadeh, K. Al-Haddad and L. A. Dessaint, "23-level Single DC Source Hybrid PUC (H-PUC) Converter Topology With Reduced Number of Components: Real-Time Implementation With Model Predictive Control," in IEEE Open Journal of the Industrial Electronics Society, vol. 1, pp. 127-137, 2020, doi: 10.1109/OJIES.2020.3007989.
• [20] S. R. Khasim, D. C, S. Padmanaban, J. B. Holm-Nielsen and M. Mitolo, "A Novel Asymmetrical 21-Level Inverter for Solar PV Energy System With Reduced Switch Count," in IEEE Access, vol. 9, pp. 11761-11775, 2021, doi: 10.1109/ACCESS.2021.3051039.
• [21] C. Dhanamjayulu, D. Prasad, S. Padmanaban, P. K. Maroti, J. B. Holm-Nielsen and F. Blaabjerg, "Design and Implementation of Seventeen Level Inverter With Reduced Components," in IEEE Access, vol. 9, pp. 16746-16760, 2021, doi: 10.1109/ACCESS.2021.3054001.
• [22] M. D. Siddique, S. Mekhilef, N. M. Shah, A. Sarwar, A. Iqbal and M. A. Memon, "A New Multilevel Inverter Topology With Reduce Switch Count," in IEEE Access, vol. 7, pp. 58584- 58594, 2019, doi: 10.1109/ACCESS.2019.2914430.
• [23] P. Omer, J. Kumar and B. S. Surjan, "A Review on Reduced Switch Count Multilevel Inverter Topologies," in IEEE Access, vol. 8, pp. 22281-22302, 2020, doi: 10.1109/ACCESS.2020.2969551.
• [24] P. Omer, J. Kumar and B. S. Surjan, "A Review on Reduced Switch Count Multilevel Inverter Topologies," in IEEE Access, vol. 8, pp. 22281-22302, 2020, doi: 10.1109/ACCESS.2020.2969551.
• [25] M. S. B. Arif, U. Mustafa, S. B. M. Ayob, J. Rodriguez, A. Nadeem and M. Abdelrahem, "Asymmetrical 17-Level Inverter Topology With Reduced Total Standing Voltage and Device Count," in IEEE Access, vol. 9, pp. 69710-69723, 2021, doi: 10.1109/ACCESS.2021.3077968.
• [26] M. D. Siddique, S. Mekhilef, M. Rawa, A. Wahyudie, B. Chokaev and I. Salamov, "Extended Multilevel Inverter Topology With Reduced Switch Count and Voltage Stress," in IEEE Access, vol. 8, pp. 201835-201846, 2020, doi: 10.1109/ACCESS.2020.3026616.
• [27] D. Prasad and C. Dhanamjayulu, "Reduced Voltage Stress Asymmetrical Multilevel Inverter With Optimal Components," in IEEE Access, vol. 10, pp. 53546-53559, 2022, doi: 10.1109/ACCESS.2022.3176110.
• [28] S. R. Khasim and C. Dhanamjayulu, "Design and Implementation of Asymmetrical Multilevel Inverter With Reduced Components and Low Voltage Stress," in IEEE Access, vol. 10, pp. 3495-3511, 2022, doi: 10.1109/ACCESS.2022.3140354.
• [29] A. Taghvaie, M. E. Haque, S. Saha and M. A. Mahmud, "A New Step-Up Switched-Capacitor Voltage Balancing Converter for NPC Multilevel Inverter-Based Solar PV System," in IEEE Access, vol. 8, pp. 83940-83952, 2020, doi: 10.1109/ACCESS.2020.2992093.
• [30] A. Iqbal, M. D. Siddique, J. S. M. Ali, S. Mekhilef and J. Lam, "A New Eight Switch Seven Level Boost Active Neutral Point Clamped (8S-7L-BANPC) Inverter," in IEEE Access, vol. 8, pp. 203972-203981, 2020, doi: 10.1109/ACCESS.2020.3036483.
• [31] Katoch, S., Chauhan, S.S. & Kumar, V. A review on genetic algorithm: past, present, and future. Multimed Tools Appl 80, 8091–8126 (2021). https://doi.org/10.1007/s11042-020-10139- 6.
• [32] Mohammad H. Nadimi-Shahraki, Shokooh Taghian, Seyedali Mirjalili, "An improved grey wolf optimizer for solving engineering problems, "Expert Systems with Applications, Volume 166, Marcg, 2021.
• [33] Shimin Li, Huiling Chen, Mingjing Wang, Ali Asghar Heidari, Seyedali Mirjalili, " Slime mould algorithm: A new method for stochastic optimization,"Future Generation Computer Systems, Volume 111,2020,Pages 300-323,
• [34] S. R. Khasim, D. C, S. Padmanaban, J. B. Holm-Nielsen and M. Mitolo, "A Novel Asymmetrical 21-Level Inverter for Solar PV Energy System With Reduced Switch Count," in IEEE Access, vol. 9, pp. 11761-11775, 2021, doi: 10.1109/ACCESS.2021.3051039.
• [35] Muhammad Najwan Hamidi, Dahaman Ishak, Muhammad Ammirrul Atiqi Mohd Zainuri, Chia Ai Ooi,"An asymmetrical multilevel inverter with optimum number of components based on new basic structure for photovoltaic renewable energy system “, Solar Energy, Volume 204,2020,Pages 13- 25,ISSN0038092X,https://doi.org/10.1016/j.solener.2020.04.05 6.
• [36] Hamidi, Muhammad Najwan & Marzuki, Arjuna & Ishak, Dahaman & Salem, Mohamed & Marzaki, Mohd & Ukaegbu, Ikechi. (2022). "Asymmetrical Multilevel Inverter-Based PV System with Voltage Feedback Control: An Experimental Validation". Applied Sciences. 12. 3581. 10.3390/app12073581.
• [37] C. Dhanamjayulu et al., "Real-Time Implementation of a 31- Level Asymmetrical Cascaded Multilevel Inverter for Dynamic Loads," in IEEE Access, vol. 7, pp. 51254-51266, 2019, doi: 10.1109/ACCESS.2019.2909831.

Uwagi

Opracowanie rekordu ze środków MNiSW, umowa nr POPUL/SP/0154/2024/02 w ramach programu "Społeczna odpowiedzialność nauki II" - moduł: Popularyzacja nauki i promocja sportu (2025).