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Evaluation of gate drive circuit effect in cascode GaN-based applications

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Języki publikacji
EN
Abstrakty
EN
This work evaluates the influence of gate drive circuitry to cascode GaN device’s switching waveforms. This is done by comparing three PCBs using three double-pulse-test (DPT) with different gate driving loop design. Among important parasitic elements, source-side inductance shows a significant impact to gate-source voltage waveform. A simulation model based on experimental measurement of the cascode GaNFET used in this work is modified by author. The simulation model is implemented in a synchronous buck converter topology and hereby to assess the impact of gate driving loop of cascode GaN device in both continuous conduction mode (CCM) and critical conduction mode (CRM). Apart from simulation, a synchronous buck converter prototype is presented for experimental evaluation, which shows a 99.15% efficiency at 5A under soft-switching operation (CRM) with a 59ns dead-time.
Rocznik
Strony
art. no. e136742
Opis fizyczny
Bibliogr. 22 poz., rys., tab.
Twórcy
autor
  • Department of Electronic and Electrical Engineering, The University of Sheffield, S1 3JD, UK
  • Department of Electronic and Electrical Engineering, The University of Sheffield, S1 3JD, UK
Bibliografia
  • [1] Power Electronics UK and CSA CATAPULT, “Opportunities and Challenges of Wide Band Gap Power Devices”, pp. 1–8, 2020.
  • [2] E.A. Jones, F.F. Wang, and D. Costinett, “Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges”, IEEE J. Emerg. Sel. Top. Power Electron. 4(3), 707–719 (2016).
  • [3] H. Jain, S. Rajawat, and P. Agrawal, “Comparision of wide band gap semiconductors for power electronics applications”, 2008 Int. Conf. Recent Adv. Microw. Theory Appl. Microw, 2008, pp. 878–881.
  • [4] S. Chowdhury, Z. Stum, Z. Da Li, K. Ueno, and T.P. Chow, “Comparison of 600 V Si, SiC and GaN power devices”, Mater. Sci. Forum 778–780, pp. 971–974 (2014).
  • [5] A. Taube, M. Sochacki, J. Szmidt, E. Kamińska, and A. Piotrowska, “Modelling and Simulation of Normally-Off AlGaN/GaN MOS-HEMTs”, Int. J. Electron. Telecommun. 60(3), 253–258 (2014).
  • [6] B.N. Pushpakaran, A.S. Subburaj, and S.B. Bayne, “Commercial GaN-Based Power Electronic Systems: A Review”, J. Electron. Mater. 49(11), 6247–6262 (2020).
  • [7] C.T. Ma and Z.H. Gu, “Review of GaN HEMT applications in power converters over 500 W”, Electronics 8(12), 1401 (2019).
  • [8] H. Jain, S. Rajawat, and P. Agrawal, Comparision of wide band gap semiconductors for power electronics applications, 2008.
  • [9] H. Umeda et al., “High power 3-phase to 3-phase matrix converter using dual-gate GaN bidirectional switches”, 2018 IEEE Applied Power Electronics Conference and Exposition (APEC), San Antonio, USA, 2018, pp. 894‒897, doi: 10.1109/ APEC.2018.8341119.
  • [10] K. Nowaszewski and A. Sikorski, “Predictive current control of three-phase matrix converter with GaN HEMT bidirectional switches”, Bull. Pol. Acad. Sci. Tech. Sci. 68(4), 1077–1085 (2020).
  • [11] S.Y. Tang, “Study on characteristics of enhancement-mode gallium-nitride high-electron-mobility transistor for the design of gate drivers”, Electronics 9(10), 1573 (2020).
  • [12] J. Rąbkowski, K. Król, M. Zdanowski, and M. Sochacki, “GaN-based soft-switched active power buffer operating at ZCS – problems of start-up and shut-down”, Bull. Pol. Acad. Sci. Tech. Sci. 68(4), 785–792 (2020).
  • [13] S. Davis, “The Great Semi Debate: SiC or GaN?”, 2019. [Online]. Available: https://www.powerelectronics.com/technologies/power-management/article/21864289/the-great-semi-debate-sic-or-gan. [Accessed: 20-Nov-2020].
  • [14] Transphorm Inc., “Cascode vs. e-mode” [Online]. Available: https:// www.transphormusa.com/en/gan-revolution/#casecode-vs-e-mode.
  • [15] Transphrom Inc., “Design Resources” [Online]. Available: https://www.transphormusa.com/en/design-resources/#evaluation-kits. [Accessed: 20-Nov-2020].
  • [16] Z. Liu, “Characterization and Application of Wide-Band- Gap Devices for High Frequency Power Conversion”, Ph.D. Thesis, Virginia Tech, 2017.
  • [17] F.C. Lee and R. Burgos, “Characterization and Failure Mode Analysis of Cascode GaN HEMT Characterization and Failure Mode Analysis of Cascode GaN HEMT”, Ms.C. Thesis, Virginia Tech, 2014.
  • [18] Z. Liu, X. Huang, F.C. Lee, and Q. Li, “Package parasitic inductance extraction and simulation model development for the high-voltage cascode GaN HEMT”, IEEE Trans. Power Electron. 29(4), 1977–1985 (2014).
  • [19] K. Umetani, K. Yagyu, and E. Hiraki, “A design guideline of parasitic inductance for preventing oscillatory false triggering of fast switching GaN-FET”, IEEJ Trans. Electr. Electron. Eng. 11(52), S84–S90 (2016).
  • [20] T. Ibuchi and T. Funaki, “A study on parasitic inductance reduction design in GaN-based power converter for high-frequency switching operation”, 2017 International Symposium on Electromagnetic Compatibility – EMC EUROPE, Angers, 2017, pp. 1‒5, doi: 10.1109/EMCEurope.2017.8094824.
  • [21] B. Sun, Z. Zhang, and M.A.E. Andersen, “Research of low inductance loop design in GaN HEMT application”, IECON 2018 – 44th Annual Conference of the IEEE Industrial Electronics Society, Washington, USA, 2018, pp. 1466‒1470, doi: 10.1109/ IECON.2018.8591732.
  • [22] Transphorm Inc., “TPH3205WSB 650 V GaN FET in TO-247 (source tab)”, 2017, [Online]. Available: https://www.transphormchina.com/en/document/650v-cascode-gan-fet-tph3205w/
Uwagi
Opracowanie rekordu ze środków MNiSW, umowa Nr 461252 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2021).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-cfcf6472-6425-4adb-a57a-91114d67310b
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