The improvement of a fail-safe counter for low-speed detection

• Autorzy: Summatta Chuthong , Rattanangam Weera

Identyfikatory

DOI

10.15199/48.2021.07.05

Warianty tytułu

PL

Poprawa niezawodnego licznika do wykrywania małej prędkości

• Języki publikacji: EN

Abstrakty

EN

This paper presents a low-speed detection method by proposing a fail-safe counter. The features of this proposed method were the adoption of digital counter circuits for the detection of low-speed, the diagnosis of the digital counter circuit, and its result output as dynamic signals to a low-pass filter and a charge pump circuit. Moreover, an additional diagnosis of a fail-safe window comparator which evaluated the DC signal level from the charge pump circuit. The improvement of a fail-safe counter for low-speed detection required a simple calculation of the circuit without any use of CPUs. These diagnoses were regarded as the frequency domain and time domain. When the motor speed became lower than the predetermined speed and there were no parts of the digital counter circuit malfunction, the dynamic signals with the low-pass frequency would be provided to the filter and the DC signal would eventually be the output, as the low-speed detection results displayed a fail-safe manner. These have been revealed by the FMEAs of the fail-safe counter, including the failure modes.

PL

W artykule przedstawiono metodę wykrywania małej prędkości, proponując licznik odporny na uszkodzenia. Cechy proponowanej metody polegają na zastosowaniu cyfrowych obwodów licznika do detekcji małych obrotów, diagnostyce obwodu licznika cyfrowego i wyprowadzaniu wyniku w postaci dynamicznych sygnałów do filtru dolnoprzepustowego i obwodu pompy ładunkowej. Ponadto dodatkowa diagnostyka niezawodnego komparatora okienkowego, który oceniał poziom sygnału DC z obwodu pompy ładującej. Udoskonalenie niezawodnego licznika do wykrywania małej prędkości wymagało prostego obliczenia obwodu bez użycia procesorów. Rozpoznania te traktowano jako dziedzinę częstotliwości i dziedzinę czasu.

Słowa kluczowe

EN

Ffil-safe; digital counter; window comparator; FMEA

PL

licznik małej prędkości; błędy zliczania

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2021
• Tom: R. 97, nr 7
• Strony: 23--28
• Opis fizyczny: Bibliogr.17 poz., rys., tab.

Twórcy

autor

Summatta Chuthong

• Faculty of Industrial Technology, Nakhon Phanom University, Thailand

• https://orcid.org/0000-0003-3276-6580

autor

Rattanangam Weera

• Faculty of Industrial Technology, Nakhon Phanom University, Thailand

• https://orcid.org/0000-0002-6241-3930

Bibliografia

• [1] IEC 61800-5-2:2007, adjustable speed electrical power drive systems - Part 5-2: Safety requirements - Functional.
• [2] S. Deeon, Y. Hirao and K. Futsuhara, “A Fail-safe Counter and its Application to Low-speed Detection”, Transactions of Reliability Engineering Association of Japan, Vol.33, No.3, pp.135-144, 2011.
• [3] J. Marcos, E. Mandado and C.M. Penalver, “Implementation of fail-safe control systems using programmable logic controllers.” Proceeding of International Conference on Industrial Automation and Control, 1995 (IA&C'95). Hyderabad, India. 5-7 Jan 1995. pp. 395 – 400.
• [4] K. Otake, Y. Hirao, T. Fukuda and K. Futsuhara, “A Safety Relay with Contacts in a safe Operational Order and Its Application.” Proceeding of The 6th International Conference on Safety of Industrial Automated Systems. New York. 13-15 Sep 2010. pp.1-6.
• [5] S. Deeon, Y. Hirao and K. Tanaka, “A Relay Drive Circuit for a Safe Operation Order and its Fail-safe Measures.” The journal of Reliability Engineering Association of Japan. Vol. 34, no.7. July 2012. pp. 489–500.
• [6] C.Summatta and S. Deeon, “Simple anti capacitor open-circuit self-oscillation in a CMOS schmitt trigger-invertor oscillator circuit.” Przeglad Elektrotechniczny. Vol. 95, no.3. Mar 2019. pp. 97–100.
• [7] S.Wongcharoen and S.Deeon “Multi-level swell voltage control for minimizing the damage to an on-grid system.” Indonesian Journal of Electrical Engineering and Informatics (IJEEI). Vol. 8, no.2. June 2020. pp. 306–319.
• [8] S.Wongcharoen, S.Deeon and N. MUNGKUNG, “ Application of Electronic Load Circuit for Electrical Safety by using a Serial Mode Comparator.” Przeglad Elektrotechniczny. Vol. 96, no.4. Apl 2020. pp. 17–22.
• [9] S.Wongcharoen and S.Deeon “Application of Multi-Stage Window Comparator Circuit with Safety Mode for Swell Voltage Control in Low Voltage Systems.” Przeglad Elektrotechniczny. Vol. 96, no.5. May 2020. pp. 84–90.
• [10] V. A. Pedroni, “Low-voltage high-speed Schmitt trigger and compact window comparator.” Electronics Letters. Vol. 41, vol.22. pp. 1213–1214.
• [11] P. Sagar, and M. Panicker P. R., “A Novel High Speed Window Comparator Circuit.” International Conference on Circuit Power and Computing Technologies (ICCPCT). pp. 691 – 693.
• [12] C. Summatta, and S. Deeon, “A Window Comparator Circuit with Digital Switching Level,” in The 9th International Conference on Sciences, Technology and Innovation for Sustainable Well-Being(STISWB 2017), China, pp. 74-78.
• [13] C.Summatta and S. Deeon, “Design and Analysis of 2oo3 Static Voter for SMT function in an Adjustable Speed Electrical Power Drive System.” Journal of Telecommunication, Electronic and Computer Engineering (JTEC). Vol. 11, no.1. Jan 2020. pp. 1–6.
• [14] IEC 60812, Analysis techniques for system reliability – Procedure for failure mode and effects analysis (FMEA) Second edition 2006-01, 2006
• [15] MIL-HDBK-2 17F, Military handbook reliability prediction of electronic equipment, U.S. Department of Defense, 1991.
• [16] J. C. Whitaker, The electronics handbook, 2nd ed., Taylor & Francis Group, LLC, 2005, pp. 687-693.
• [17] M. Krasich, “How to estimate and use MTTF/MTBF would the real MTBF please stand up?,” in Reliability and Maintainability Symposium, Jan. 2009, pp. 353-359.

Uwagi

Opracowanie rekordu ze środków MNiSW, umowa Nr 461252 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2021).