Analysis of High-Performance Near-threshold Dual Mode Logic Design

• Autorzy: Bikki Pavankumar

Identyfikatory

DOI

10.24425/ijet.2019.130253

• Języki publikacji: EN

Abstrakty

EN

A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML model has unique feature that allows switching between both modes of operation as per the real-time system requirements. The DML functions in two dissimilar modes (static and dynamic) of operation with its specific features, to selectively obtain either low-energy or high-performance. The sub-threshold region DML achieves minimum-energy. However, sub-threshold region consequence in performance is enormous. In this paper, the working of DML model in the moderate inversion region has been explored. The near-threshold region holds much of the energy saving of subthreshold designs, along with improved performance. Furthermore, robustness to supply voltage and sensitivity to the process temperature variations are presented. Monte carol analysis shows that the projected near-threshold region has minimum energy along with the moderate performance.

Słowa kluczowe

EN

CMOS logic; dual mode logic; dynamic mode; high performance; minimum energy point; near-threshold

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2019
• Tom: Vol. 65, No. 4
• Strony: 723--729
• Opis fizyczny: Bibliogr. 34 poz., wykr., rys., tab.

Twórcy

autor

Bikki Pavankumar

• National Institute of Technology Andhra Pradesh, India

Bibliografia

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