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Effective biclustering on GPU - capabilities and constraints

Wybrane pełne teksty z tego czasopisma
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Warianty tytułu
PL
Efektywna biklasteryzacja z wykorzystaniem GPU - możliwości i ograniczenia
Języki publikacji
EN
Abstrakty
EN
This article presents the benefits and limitations related to designing a parallel biclustering algorithm on a GPU. A definition of biclustering is provided together with a brief description of the GPU architecture. We then review algorithm strategy patterns, which are helpful in providing efficient implementations on GPU. Finally, we highlight programming aspects of implementing biclustering algorithms in CUDA/OpenCL programming language.
PL
W artykule przedstawiono korzyści i ograniczenia związane z projektowaniem równoległego algorytmu biklasteryzacji, przeznaczonego na GPU. Zaprezentowano definicję biklasteryzacji oraz skrótowo opisano architekturze GPU. Zestawiono popularne wzorce strategii implementacji algorytmów, przydatne w projektowaniu efektywnych rozwiązań na GPU. Publikacja zawiera także praktyczne wskazówki programistyczne, w kontekście implementacji algorytmów biklasteryzacji w języku CUDA/OpenCL.
Rocznik
Strony
131--134
Opis fizyczny
Bibliogr. 19 poz., rys.
Twórcy
  • AGH University of Science and Technology, Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering, Department of Automatics and Bioengineering, al. A. Mickiewicza 30, 30-059 Kraków, Poland
autor
  • AGH University of Science and Technology, Faculty of Computer Science, Electronics and Telecommunications, Department of Computer Science, al. A. Mickiewicza 30, 30-059 Kraków, Poland
Bibliografia
  • [1] G. E. Moore. Cramming more components onto integrated circuits. Electronics, 38(8), April 1965.
  • [2] R.H. Dennard, F.H. Gaensslen, V.L. Rideout, E. Bassous, and A.R. LeBlanc. Design of ion-implanted mosfet’s with very small physical dimensions. Solid-State Circuits, IEEE Journal of, 9(5):256–268, October 1974.
  • [3] C.M. Wittenbrink, E. Kilgariff, and A. Prabhu. Fermi gf100 gpu architecture. IEEE Micro, 31(2):50–59, 2011.
  • [4] H. Esmaeilzadeh, E. Blem, R. St Amant, K. Sankaralingam, and D. Burger. Dark silicon and the end of multicore scaling. In Computer Architecture (ISCA), 2011 38th Annual International Symposium on, pages 365–376. IEEE, 2011.
  • [5] D. Luebke, J. Owens, M. Roberts, and C.H. Lee. Intro to parallel programming. http://www.udacity.com/course/cs344. Online course in cooperation with NVIDIA.
  • [6] Opencl programming guide for cuda architecture. http: //www.nvidia.com/content/cudazone/download/ OpenCL/NVIDIA_OpenCL_ProgrammingGuide.pdf, 2009. Version 2.3.
  • [7] Cuda c programming guide. http://docs.nvidia.com/ cuda/pdf/CUDA_C_Programming_Guide.pdf, 2014. PG- 02829-001_v6.0.
  • [8] Y. Cheng and G.M. Church. Biclustering of expression data. In Proceedings of the eighth international conference on intelligent systems for molecular biology, volume 8, pages 93–103, 2000.
  • [9] S.C. Madeira and A.L. Oliveira. Biclustering algorithms for biological data analysis: a survey. Computational Biology and Bioinformatics, IEEE/ACM Transactions on, 1(1):24–45, 2004.
  • [10] A. Prelić, S. Bleuler, P. Zimmermann, A. Wille, P. Bühlmann, W. Gruissem, L. Hennig, L. Thiele, and E. Zitzler. A systematic comparison and evaluation of biclustering methods for gene expression data. Bioinformatics, 22(9):1122–1129, 2006.
  • [11] K. Eren, M. Deveci, O. Küçüktunç, and Ü.V. Çatalyürek. A comparative analysis of biclustering algorithms for gene expression data. Briefings in Bioinformatics, 2012.
  • [12] P. Orzechowski. Proximity measures and results validation in biclustering – a survey. In L. Rutkowski et al., editor, Artificial Intelligence and Soft Computing, volume 7895 of Lecture Notes in Computer Science, pages 206–217. Springer Berlin Heidelberg, 2013.
  • [13] B. Liu, Yao Xin, Ray C.C. Cheung, and Hong Yan. Gpubased biclustering for microarray data analysis in neurocomputing. Neurocomputing, 134(0):239–246, 2014. 19th International Conference on Neural Information Processing (ICONIP2012).
  • [14] A.E. Sariyüce, K. Kaya, E. Saule, and Ü.V. Çatalyürek. Betweenness centrality on gpus and heterogeneous architectures. In Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, pages 76–85. ACM, 2013.
  • [15] M.D. McCool, A. D. Robison, and J. Reinders. Structured parallel programming patterns for efficient computation. Elsevier/ Morgan Kaufmann, Waltham, M.A., 2012.
  • [16] W.D. Hillis and G.L. Steele Jr. Data parallel algorithms. Commun. ACM, 29(12):1170–1183, 1986.
  • [17] G.E. Blelloch. Prefix sums and their applications. In Sythesis of parallel algorithms, pages 35—60. Morgan Kaufmann Publishers Inc., 1990.
  • [18] Kenneth E. Batcher. Sorting networks and their applications. In AFIPS Spring Joint Computing Conference, volume 32 of AFIPS Conference Proceedings, pages 307–314. Thomson Book Company, Washington D.C., 1968.
  • [19] Nvidia’s opencl best practices guide. www.nvidia.com/ content/cudazone/CUDABrowser/downloads/papers/ NVIDIA_OpenCL_BestPracticesGuide.pdf, 2009.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-b1ae30e0-3d7a-4158-9f78-5d4f026fb7da
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