Tolerance Maximisation in Fault Diagnosis of Analogue Electronic Circuits

• Autorzy: Chruszczyk Ł. , Rutkowski J.

Warianty tytułu

PL

Maksymalizacja tolerancji w diagnostyce uszkodzeń analogowych układów elektronicznych

• Języki publikacji: EN

Abstrakty

EN

This paper presents method of designing periodic test excitation for fault diagnosis of analogue electronic circuits. There has been proposed maximisation of circuit components tolerances while keeping assumed level of fault diagnosis. There has also been shown that combination of fault detection and location in a single step can remarkably shorten testing time. The optimisation process involves genetic algorithm.

PL

W pracy przedstawiono projektowanie periodycznego pobudzenia testowego dla diagnostyki uszkodzeń analogowych układów elektronicznych. Zaproponowano sposób maksymalizacji tolerancji elementów obwodu przy zachowaniu założonego poziomu diagnostyki uszkodzeń. Wykazano również, że połączenie etapów detekcji i lokalizacji uszkodzeń może znacząco skrócić czas testowania.

Słowa kluczowe

EN

fault diagnosis; analogue electronics; test time reduction; components tolerance; genetic algorithm; electrical technology; electrical power engineering

PL

diagnostyka uszkodzeń; elektronika analogowa; redukcja czasu testowania; tolerancja elementów; algorytm genetyczny; elektrotechnika; elektroenergetyka

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2011
• Tom: R. 87, nr 10
• Strony: 159--163
• Opis fizyczny: Bibliogr. 18 poz., il., tabl., wykr.

Twórcy

autor

Chruszczyk Ł.

autor

Rutkowski J.

• Department of Automatic Control, Electronics and Computer Science, Akademicka 16, 44-100 Gliwice, Poland,

Bibliografia

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