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Analysis of a Simple Method of CMOS IC Design for Yield Optimization

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EN
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A simple approach for CMOS integrated circuit (IC) design taking into account a process variability and oriented towards optimization of a parametric yield has been presented. Its concept is based on cumulative distribution functions of random variables representing IC performances subject to process variations. In the method it has been assumed that CMOS process statistical data are expressed in terms of so-called process parameter distributions. Thus the design centering is done via layout parameter tuning. The approach relies on maximizing the probability that random variables corresponding to IC performances remain within the performance boundaries. Also, a methodology for statistical characterization of CMOS process has been briefly described. Finally, the method operation has been illustrated using analytical and SPICE models of CMOS inverter, operational amplifier and ring oscillator.
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Bibliografia
  • [1] Cadence Advanced Analysis Tools User Guide, Product Version 5.0, July 2002, pp.9-68
  • [2] C.C. McAndrew, "Efficient Statistical Modeling for Circuit Simulation" in "Design of System on a Chip Devices&Components" eds. R.Reis, J.A.G.Jess, Kluwer Academic Publishers, 2004
  • [3] M.Yakupov, D.Tomaszewski, W.Grabinski, " Process Control Monitor Based Extraction Procedure for Statistical Compact MOSFET Modeling", 17th Int. Conf. Mixed Design of Integrated Circuits and Systems, MIXDES, WrocZaw, June 24-26, 2010
  • [4] K.-H.Rooch, U.Sobe, M.Pronath, "Circuit Design-for-Yield (DFY) for a 110dB Op-Amp for Automotive and Sensor Applications", in GME/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, 2006
  • [5] H.Shichman, D.A.Hodges, "Modeling and Simulation of Insulated-Gate Field-Effect Transistor Circuits", IEEE J. of Solid-State Circuits, vol. SC-3, no. 3, Sept. 1968, pp. 285-289
  • [6] J.P.Uemura, "CMOS Logic Circuit Design", Kluwer Academic Publishers, 2002
  • [7] M.Hershenson, S.P.Boyd, T.H. Lee, "Optimal Design of a CMOS Op-Amp via Geometric Programming", IEEE Trans.Computer-Aided Design of Integrated Circuits and Systems, Vol.20, No.1, Jan.2001, pp.1-21
  • [8] http://www-device.eecs.berkeley.edu/bsim/?page=BSIM3
  • [9] ngspice project, http://ngspice.sourceforge.net
  • [10] Qucs project, http://qucs.sourceforge.net/
  • [11] GNU Octave, http://www.gnu.org/software/octave/
  • [12] A.Asenov, "Comprehensive TCAD based compact model extraction including process variation, temperature effects and statistical variability and reliability effects", tutorial "FinFET/SRAM co-design beyond 16 nm CMOS", ESSDERC 2012 Conference, Bordeaux, Sept 17, 2012
  • [13] The R Project for Statistical Computing, http://www.r-project.org/
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bwmeta1.element.baztech-article-LODD-0002-0031
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