Identyfikatory
Warianty tytułu
Języki publikacji
Abstrakty
Thermal impedance measurement of semiconductor devices is one of the standard and well established methods of characterization. From such measurements can be obtained not only behavioral information in the form of graphs or models for thermal simulation, but also structural information about the thermal path involved, from source to sink, that can be very useful in device assembly process characterization and control. Structural information, however, usually requires many processing steps of measured data with its associated calculation burden and numerical errors. This work proposes a method to extract structural information from measured data in a straightforward way, with very few and elementary calculations, thus providing a useful analysis tool.
Rocznik
Tom
Strony
100--104
Opis fizyczny
Bibliogr. 12 poz.
Twórcy
autor
- Electronic Engineering Department at the Universitat Politecnica de Catalunya , Jordi Girona 1-3, 08034 Barcelona, Spain, francesc.masana@upc.edu
Bibliografia
- [1] "Methodology for Ihc Thermal Measurements of Component Packages (Single Semiconductor Devices)". EIA/JEDEC Standard EIA/JESD-51.1995.
- [2] D.L. Blackburn. "Temperature Measurements of Semiconductor Devices: A Review". Proc. SEMI-THERM 20., pp 70-80, 2004.
- [3] Z. Jacopovic. "Computer Controlled Measurement of Power MOSFET Transient Thermal Response". PESC'92 Proceedings, pp 1026-1032, 1992.
- [4] J. Zarebski, K. Gorccki. "A Method of the BIT Transient Thermal Impedance Measurement with Double Junction Calibration". 1 l'b IEEE SEMI-THERM Symposium, pp BO-82, 1995.
- [5] Z.Jacopovic, Z Bencic, F.Kolonic. "Important Properties of Transient Thermal Impedance for MOS-gated Power Semiconductors". 1SIE'99 Proceedings, pp 574-578, 1999.
- [6] F.N. Masana. "Thermal impedance measurements under non- cquilibnum conditions. How to extend its validity". Microelectronics and Reliability, Vol. 48, No. 4, pp 563-568, April 2008.
- [7] J Zarebski, K. Gorecki: "A Method of Measuring the Transient Thermal Impedance of Monolithic Bipolar Switched Regulators". IEEE Transactions on Components and Packaging Technologies, Vol 30, No. 4, pp 627-631,Dec.2007.
- [8] V. Szekely, T. van Bien. "Fine structure of heat flow path in semiconductor devices: A measurement and identification method". Solid State Electronics, Vol. 31, No 9, pp 1363-1368, 1988.
- [9] F.N. Masana. "A straightforward analytical method for extraction of semiconductor deuce transient thermal parameters". Microelectronics and Reliability, Vol. 47, No. 12, pp 2122-2128, Dec. 2007
- [10] K.Kurabayashi, IC.Ii.Goodson. "Precision Measurement and Mapping of Die-Attach Thermal Resistance" IEEE Trans. on CPMT, Part A. Vol 21, No 3, pp 506-514, 1998
- [11] F.N. Masana. "Die Attach Thermal Monitoring of IGBT Devices". MIXDES'2006 Gdynia, pp 421-424, 2006.
- [12] A.B. Kahng, S. Muddu. "Delay Analysis of VLSI Interconnection:, using the Diffusion Equation Model". Proc. ACM/IEEE Design Automation Conference,June 1994, pp 563-569.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-LOD7-0029-0063