Identyfikatory
Warianty tytułu
Języki publikacji
Abstrakty
The paper introduces an analog circuit designed as a provider of a trapezoidal waveform, scalable in amplitude and slew-rate value. In addition the circuitry is equipped with edge-rounding capability, implemented inside output voltage buffer. Schematics, rule of operation and exemplary simulations are included.
Rocznik
Tom
Strony
35--38
Opis fizyczny
Bibliogr. 4 poz.
Twórcy
autor
- Departament of Microelectronics and Computer Science, Technical University of Łódź, Wólczańska 221/223, 90-924 Łódź, Poland, jankowsk@dmcs..p.lodz.pl
Bibliografia
- [1] United States Patent 5025172, "Clock generator generating trapezoidal waveform", Issued on June 18, 1991.
- [2] M. Jankowski, "Adjustable Output Voltage-Range Trapezoidal Waveform Generator with Harmonics-Reduction Functionality", International Conference TCSET'2008, Lviv-Slavsko, Ukraine, February, 19-23, 2008.
- [3] M. Jankowski, "Trapezoidal Waveform Generation Circuit with Adjustable Output Voltage Range", International Conference CADSM'2007, Polyana, Ukraine, February, 20-24, 2007.
- [4] R. J. Baker, "Cmos: Circuit Design, Layout, and Simulation, 2nd Edition", Wiley-IEEE Press, November 2004.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-LOD7-0029-0053