Reduced stress and fluctuation for the integrated α-Si TFT gate driver on the LCD

• Autorzy: Huang N. X. , Shiau M. S. , Wu H.-C. , Sun R. C. , Liu D.-G.
• Języki publikacji: EN

Abstrakty

EN

In this paper, an integrated TFT gate driver was designed on the glass substrate not only to decrease the fluctuation at the output, but also to reduce the stress effect on the pull-down branches. The fluctuation in the voltage at the output transistor was attributed to the coupled clocks through the parasitic capacitors in the TFTs. In this study, the voltage gating the pull-down braches was reduced for longer operational lifetime. This scheme was investigated by simulation by Smart-SPICE with an α-Si TFT model from Wintek Inc. at level 35.

Słowa kluczowe

EN

gate driver; fluctuation noise; stress effect; system on panel (SoP)

PL

sterownik bramy; fluktuacja hałasu; wpływ naprężenia; system w panelu

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2010
• Tom: Vol. 1, nr 3
• Strony: 311--315
• Opis fizyczny: Bibliogr. 9 poz.

Twórcy

autor

Huang N. X.

autor

Shiau M. S.

autor

Wu H.-C.

autor

Sun R. C.

autor

Liu D.-G.

• Graduate Institute of Electrical and Communication Engineering, Feng Chia University, Taichung 40724, Taiwan, R.O.C.,

Bibliografia

• [1] H. C. Cheng, C. Y. Huang, J. W. Lin, Kung, J. J.-H., "The reliability of amorphous silicon thin film transistors for LCD under DC and AC stresses" Solid-State and Integrated Circuit Technology, 1998. Proceedings, 1998 5th International Conference on 21-23. pp 834 - 837, Oct. 1998.
• [2] S. Y. Yoon, Y. H. Jang, B. K , M. D. Chun, H. N. Cho, N. W. Cho, C. Y. Sohn. S. H. Jo, C. D. Kirn and I. J. Chung, "Highly Stable Integrated Gate Driver Circuit using a-Si TFT with Dual Pull-down Structure" SID2005, Digest 172L, pp.348, 2005.
• [3] H. R. Han, J. F. Tsai, W. T. Liao, and W. C. Wang, "Reliable Integrated a-Si Select Line Driver for 2.2-in QVGA TFT-LCD" SID2005, Digest 15_3, pp.946, 2005.
• [4] M. S. Shiau, M.Y. Tsao, H. C. Wu, C. H. Cheng and D. G. Liu, "Reducing the Stress on the Output Transistors of On-Panel TFT Gate Drivers", Chinese Journal of Electron Devices , vol.31 , no. l , pp.124-129, Feb. 2008.
• [5] M. Y. Tsao , M. S. Shiau , H. C. Wu, D. G. Liu, C. H. Cheng, "Reliable Gate Driver Circuits on Integrated TFT-LCD Panels," Conference on electronic communication and Applications, CECA 2006, Kaohsiung, R.O.C., July 6, 2006.
• [6] M. S. Shiau, M. Y. Tsao, H. C. Wu, D. G. Liu, C. H. Cheng, "Reduce High Voltage Stress Time on Gate Driver Circuits of Integrated TFT-LCD Panels," 2006 Taiwan Display Conference, Taipei, R.O.C., June 15 16, 2006.
• [7] J. H. Oh. J. H. Hur, Y. D. Son, K. M. Kim, S. H. Kim, E. H. Kim. J. W. Choi, S. M. Hong, J. O. Kim, B. S. Bae and J. J., "2.0 inch a-Si:H TFT-LCD with Low Noise Integrated Gate Driver" SID'05, Digest 15_2, 2005.
• [8] E. L. Deng, M. S. Shiau, N. X. Huang, D. G. Liu. "A Novel Design of Low Noise On-panel TFT Gate Driver," 8th International Meeting on Information Display, International Display Manufacturing Conference and Asia Display, KINTEX, Ilsan. Korea, October 13-17 2008.
• [9] D. R. Allee, L. T. Clark, B. D. Vogt, R. Shringarpure, S. M. Venugopal, S. G. Uppili, K. Kaftanoglu, H. Shivalingaiah. Z. P. Li, J. J. Ravindra Fernando, E. J. Bawolek, S. M. O'Rourke, "Circuit-Level Impact of a-Si:H Thin-Film-Transistor Degradation Effects " Electron Devices, IEEE Transactions Vol. 56, no. 6, pp 1166-1176, Jnue 2009.