Electro-thermal Co-simulation of Ics with runtime back-annotation capability

• Autorzy: Timár A. , Bognár G. , Poppe A. , Rencz M.
• Języki publikacji: EN

Abstrakty

EN

A novel approach to logical and thermal co-simulation of ASIC circuits is presented in this paper. Numerous electro-thermal simulator implementations are present nowadays, but these simulators approach the electro-thermal simulation domain by co-simulating electronic and thermal effects at a low structural level.This approach has the advantage of being very accurate but at the expense of simulation time. In this paper an alternative way to simulate standard cell ASIC circuits electrically and thermally in a concurrent process, in RTL level is presented. Our approach considers standard cells of a digital design as basic building blocks and calculates a thermal distribution map on the surface of the chip. The temperature map is calculated from the cells' power characteristics and the switching activity of the regularly working circuit. We call the presented approach logi-thermal simulation. An implementation of the method is also presented in this paper: a new simulation software, CettTherm is under heavy development in the Department of Electron Devices at BME, Hungary.

Słowa kluczowe

EN

logi-thermal simulation; electro-thermal simulation; temperature distribution

PL

elektrotermiczna symulacja; rozkład temperatury; logi-termiczna symulacja

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2010
• Tom: Vol. 1, nr 3
• Strony: 287--292
• Opis fizyczny: Bibliogr. 15 poz.

Twórcy

autor

Timár A.

autor

Bognár G.

autor

Poppe A.

autor

Rencz M.

• Department of Electron Devices, Budapest University of Technology and Economics, Budapest, Hungary, H-1117.,

Bibliografia

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