Design of a 3rd order 1.5-bit continuous-time (CT) sigma-delta (ΣΔ) modulator optimized for class D audio power amplifier

• Autorzy: de Melo J. , Paulino N.
• Języki publikacji: EN

Abstrakty

EN

This paper presents a 3rd order 1.5-bit ΣΔ modulator with distributed feedback and local resonator feedback for a Class D audio amplifier. In order to improve the signal-to-noise-and-distortion ratio (SNDR), without increasing the oversampling ratio (OSR) or the order of the modulator, the modulator uses transmission zeros and 1.5-bit quantization. High level simulations of the modulator architecture show that it has a maximum SNDR value of 81 dB, for a signal bandwidth of 18 kHz and a sampling frequency of 1.2 MHz. An electrical circuit is designed to implement the proposed architecture and the electrical simulations show that it has a maximum SNDR value of 76.1 dB. The influence of the constituting blocks of the circuit in the performance of the modulator is investigated using electrical simulations.

Słowa kluczowe

EN

Continuous-Time(CT) Sigma-Delta(ΣΔ); class D amplifier; audio

PL

czas ciągły sigma-delta; wzmacniacz klasy D; audio

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2010
• Tom: Vol. 1, nr 2
• Strony: 156--164
• Opis fizyczny: Bibliogr. 7 poz.

Twórcy

autor

de Melo J.

autor

Paulino N.

• Department of Electrical Engineering, Faculty of Sciences and Technology, and with the Center of Technology and Systems (CTS-UNINOVA), New University of Lisbon, 2829-516 Caparica. Portugal,

Bibliografia

• [1] Ronan van der Zee, "High efficiency audio power amplifiers, design and practical use," Ph.D. dissertation, Universiteit Twente, 1999.
• [2] S. Brigati, F. Francesconi, P. Malcovati, D. Tonietto, A. Baschirotto, F. Maloberti, "Modeling Sigma-Delta Modulator non-idealities in SIMULINK," Proceedings of ISCAS'99, Vol.2, pp. 384-387, 1999.
• [3] J Pan, LB Yao, and Y Lian, "A Sigma-Delta Class D Audio Power Amplifier in 0.35um CMOS Technology," International SoC Design Conference, Pusan, 24-25 Nov. 2008, South Korea. (Invited Paper).
• [4] Steven R. Norsworthy. Richard Schreier, and Gabor C. Temes, "Delta-Sigma data converters theory, design, and simulation (Book style)." Chapter 4, IEEE Press. 1997.
• [5] Putzeys, Bruno, "Simple Self-Oscillating Class D Amplifier with Full Output Filter Control," Presented at the 118th AES Convention, Barcelona, Spain, May 2005.
• [6] Eric Gaalaas, "Class D Audio Amplifiers: What, Why, and How," Analog Dialogue, Volume 40, June 2006.
• [7] Wylie. F., "Digital audio data compression," Electronics and Communication Engineering Journal, pp. 5-10, February 1995.