AMC timing receiver and clock synthesizer module for the LLRF system

• Autorzy: Czuba K. , Bou Habib S. , Sikora D.
• Języki publikacji: EN

Abstrakty

EN

The new LLRF system architecture based on the ATCA platform was developed and tested at FLASH. The LLRF system require generation of highly stable clock and trigger signals for high precision data processing and synchronous system operation. This paper describes the conception, design and performance test results of the updated AMC module designed to fulfill the LLRF system timing synchronization needs. This module contains three independent clock synthesizers that are able to generate LVDS clock signals in the range of 10 MHz to 100 MHz. These signals are transmitted over the AMC connector and can be distributed over the entire ATCA crate.The clock synthesizers can be synchronized either by an internal quartz oscillator or an external phase reference signal provided to the board either via the AMC edge connector or via a front panel socket. This assures flexibility when using the board for tests and for the LLRF system operation. Besides clock synthesizers the AMC card contains also an optical receiver suited to convert and decode FLASH timing signals distributed in the FLASH accelerator system.

Słowa kluczowe

EN

clocks; phase locked loop; timing jitter; ATCA

PL

zegary; pętle fazowe; jitter na synchronizację czasową

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2010
• Tom: Vol. 1, nr 2
• Strony: 125--130
• Opis fizyczny: Bibliogr. 7 poz.

Twórcy

autor

Czuba K.

autor

Bou Habib S.

autor

Sikora D.

• Warsaw University of Technology, Institute of Electronic Systems, Warsaw PL00-665, Poland,

Bibliografia

• [1] S. Simrock et al., "Digital low-level rf controls for future superconducting linear colliders" PAC05, pages 515-519.
• [2] S.N Simrock, V. Ayvazyan, A. Brandt, M. Hüning, W. Koprek, F. Ludwig, P Pucyk, K. Rehlich, E. Vogel, H.C. Weddig, M. Grecki, T. Jezynski, W. Jalmuzna, "Conceptual llrf design for the european xfel - LINAC 2006", Knoxwille, Tennessee, USA.
• [3] S. Simrock, M. Grecki, T. Jeżyński, W. Koprek, Ł. Butkowski, G. Jabłoński, W. Jałmużna, D. Makowski, K. Czuba, "Evaluation of an ATCA Based LLRF System at FLASH", Proc. 16th Int. Conf. Mixed Design of ICs and Systems, Lodz, 25-27 June 2009.
• [4] K. Czuba, K Antoszkiewicz, S. Simrock, H. Weddig, "The RF Phase Reference Distribution System for The European XFEL", PAC09, Vancouver, Canada, May 2009.
• [5] T. Jezynski et al, "Prototype AdvancedTCA Carrier Board with three AMC bays". Nuclear Science Symposium Conference Record, 2008. NSS '08.
• [6] D. Makowski and A. Piotrowski and A. Napieralski , "Universal communication module based on AMC standard," Mixed Design of Integrated Circuits and Systems (MIXDES) 2008, Pozna, Polska, 2008.
• [7] M. Ladno, "AMC timing receiver and clock synthesizer module for the LLRF system", Msc Thesis, Warsaw University of Technology, Poland, 2008.