Hardware implementation of iterative image reconstruction algorithm for capacitance tomography

• Autorzy: Czarnecki P.
• Języki publikacji: EN

Abstrakty

EN

Iterative image reconstruction takes relatively long computing time limiting applications of capacitance tomography in high speed processes. A hardware/software co-design approach to accelerate the Landweber algorithm described in this paper. Due to considerable logic and embedded multipliers resources in FPGA devices, time consuming operations can be realized concurrently. This paper also consider devices requirements and evaluation of image reconstruction rate.

Słowa kluczowe

EN

capacitance tomography; hardware; image reconstruction; Landweber; iterative algotithm

• Wydawca: Wydawnictwo Politechniki Łódzkiej
• Czasopismo: Zeszyty Naukowe. Elektryka / Politechnika Łódzka
• Rocznik: 2009
• Tom: z. 114
• Strony: 109--112
• Opis fizyczny: Bibliogr. 3 poz.

Twórcy

autor

Czarnecki P.

• Institute of Radioelectronics, Warsaw University of Technology,

Bibliografia

• YANG J.D., LEE S.H., KIM K.Y., CHOI B.Y., (2006), Modified iterative Landweber method in electrical capacitance tomography, Measurement Science and Technology , Vol.10, pp. 1088-0957
• YANG W.Q., SPINK D.M., YORK T.A., MCCANN H., (1999), An image-reconstruction algorithm based on Landweber's iteration method for electrical-capacitance tomography, Measurement Science and Technology , Vol.10, pp.1065-1069
• YANG W.Q., PENG L.H., (2003), Image reconstruction algorithms for electrical capacitance tomography, Measurement Science and Technology, Vol. 14, pp.1-13