On design of high speed tests pattern generators based on ring LFSRs

• Autorzy: Hławiczka A. , Garbolino T.
• Języki publikacji: EN

Abstrakty

EN

The paper describes a method of designing ring registers that have short feedback connections and contain cells functioning as D or T flip-flops. The proposed approach enables obtaining a ring register operating with a maximum frequency for a wide range of polynomials for which existing methods are unable to provide optimal results. The paper also contains a number of examples illustrating different techniques of designing ring registers.

Słowa kluczowe

EN

linear ring register; linear feedback shift register; operating frequency

PL

rejestr pierścieni liniowych; liniowe sprzężenie zwrotne; częstotliwość robocza

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: Electronics and Telecommunications Quarterly
• Rocznik: 2008
• Tom: Vol. 54, No 1
• Strony: 43--51
• Opis fizyczny: Bibliogr. 8 poz., rys.

Twórcy

autor

Hławiczka A.

autor

Garbolino T.

• Silesian University of Technology, Institute of Electronics, ul. Akademicka 16, 44-100 Gliwice, Poland,

Bibliografia

• 1. M. Bellos, D. Kagaris, D. Nikolos: "Test Set Embedding Based on Phase Shifters". Proc. of Fourth European Dependable Computing Conference - E0CC-4, Toulouse, France, October 23-25, 2002, pp. 90-101.
• 2. A. Hławiczka: "D or T Flip-Flop Based Linear Registers". Archives of Control Sciences (former Archiwum Automatyki i Telemechaniki), vol. 1 (XXXVII), 1992, no. 3-4, pp. 249-268.
• 3. A. Hławiczka: "Linear Registers-Analysis, Synthesis and Applications in Digital Circuits Testing" (Rejestry liniowe - analiza, synteza i zastosowania w testowaniu ukfadow cyfrowych). Skrypt Politechniki Śląskiej nr 1370, seria Elektronika z. 9, 1997.
• 4. T. Garbolino, A. Hławiczka: "A New LFSR with D and T Flip-Flops as an Effective Test Pattern Generator for VLSI Circuits", Proc. of Third European Dependable Computing Conference - EDCC-3, Prague, Czech Republic, September 15-17, 1999, Lecture Notes in Computer Science, Springer Verlag Press, pp. 321-338.
• 5. G. Mrugalski, N. Mukherjee, J. Rajski, J. Tyszer: "Dense Ring Generators of Pseudo-Random Test Patterns", Proc. of the 6th IEEE Inter. Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'03), Poznan, April 14-16, 2003, pp. 65-72.
• 6. G. Mrugalski, J. Rajski, J. Tyszer: "High Speed Ring Generators and Compactors of Test Data", Proc. of the 21st IEEE VLSI Test Symposium (VTS'03) pp. 57-62.
• 7. P. Rosinger, B. M. Al-Hashimi, N. Nicolici: "Dual multiple-polynomial LFSR for low-power mixed-mode BIST", IEE Proc. Computers and Digital Techniques, Vol. 150, Issue 4, 18 July 2003, pp. 209-217.
• 8. C. E. Stroud: "A Designer's Guide to Built-in Self-Test", Kluwer Academic Publishers, 2002.