New Conception of Safety Logic Microcontroller

• Autorzy: Sałamaj M.
• Języki publikacji: EN

Abstrakty

EN

In this paper a new conception of safety logic microcontroller (BML) is described, together with its physical hardware realization. The unit has various mechanisms which increase its safety and reliability, so that it can satisfy rigorous requirements of safety-critical systems. Thus, the BML unit uses some untypical and innovative technical solutions. The new approach to safety systems development allowed to propose a new conception. The paper describes also physical realization of small multiprocessor BML unit for management of decision-control systems adopted to critical usage.

Słowa kluczowe

EN

safety logic microcontroller; critical systems; master-slave architecture; handshake; GALS; conception

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2012
• Tom: Vol. 58, No. 4
• Strony: 419--424
• Opis fizyczny: Bibliogr.12 poz., tab., wykr.

Twórcy

autor

Sałamaj M.

• Institute of Computer Science and Production Management, Faculty of Mechanical Engineering, University of Zielona Góra, 65-516 Zielona Góra, Poland

Bibliografia

• [1] M. Adamski and M. Salamaj, „Programowalny sterownik logiczny”, Polish Patent P388 721, Aug. 03, 2009.
• [2] M. Colnaric, D. Verber, and W. A. Halang, Distributed Embedded Control Systems: Improving Dependability with Coherent Design, 1st ed., ser. Advances in Industrial Control. Springer Publishing Company, Incorporated, 2008.
• [3] M. Wegrzyn and A. Bukowiec, „Design of safety critical logic controller using devices integrated microprocessors with FPGA”, in Proceedings of SPIE'05, vol. 5775, 2005, pp. 377-384.
• [4] J. Rinaldi, „Control IEC 61131-3 : The Fast Guide to IEC 61131-3 Open Control Standard & Software”, Real Time Automation, 2010.
• [5] W. A. Halang and M. Sniezek, „A safe programmable electronic system”, Bulletin of the Polish Academy of Sciences, Technical Sciences, vol. 58, no. 3, pp. 423-434, 2010.
• [6] M. Sniezek and W. A. Halang, Bezpieczny programowalny mikrosterownik logiczny. Rzeszów, Polska : Oficyna Wydawnicza Politechniki Rzeszowskiej, 1998, in Polish.
• [7] M. Sniezek and W. A. Halang, „Electronic system for safety tasks programmed with logic diagrams and flow charts uses two computers for processing function block references and converting data flow between function blocks and signal sequences specified by flow charts”, Patent DE19 861 281, 2008.
• [8] A. Julius, „GALS - global asynchronous local synchronous circuits”, Humboldt-Universitat (HU-Berlin), 2004.
• [9] M. Krstic and E. Grass, „New GALS technique for datapath architectures”, Springer-Verlag Berlin Heidelberg, vol. 2799, pp. 161-170, 2003.
• [10] M. Sniezek and J. Stackelberg, „A fail safe programmable logic controller”, Annual Reviews in Control, vol. 27, pp. 63-72, 2003.
• [11] S. Zaba, „Analiza czasowa cyfrowych interfejsów mikroprocesorowych z architekturą master-slave”, Pomiary Automatyka Robotyka, vol. 4, pp. 13-17, 2005, in Polish.
• [12] S. Smith, „An asynchronous GALS interface with applications”, in Proceedings of the 2004 IEEE Workshop on Microelectronics and Electron Devices (WMED'04), Boise, Idaho, United States, 2004, pp. 41-44.