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Reconfigurable architectures for parallel execution of image processing tasks

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Konferencja
Fifth Symposjum on Image Processing Technology (TPO 2006) ; (5 ; 21-23.11.2006 ; Serock, Poland)
Języki publikacji
EN
Abstrakty
EN
Reconfigurable computers are becoming third, after general purpose processors and digital signal processors, programmable computing systems. In the present paper, a new definition of parallelism adequate for fine-grain parallel systems is introduced. Computing power requirements for high definition, real-time vision system are discussed. A survey of reconfigurable solutions for image processing and the latest research work carried on at the AGH Laboratory of Biocybernetics are presented.
Twórcy
autor
  • Institute of Automatics, University of Science and Technology, Al. Mickiewicza 30, 30-059 Cracow, mago@agh.edu.pl
Bibliografia
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Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BWA9-0012-0011
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