Software implemented fault detection and fault tolerance mechanisms. Part 1, Concepts and algorithms

• Autorzy: Gawkowski P. , Sosnowski J.

Warianty tytułu

PL

Programowe mechanizmy detekcji i tolerowania błędów sprzętu. Cz. 1, Koncepcje i algorytmy

• Języki publikacji: EN

Abstrakty

EN

The paper discusses the problem of eliminating hardware fault effects by means of software. We describe various error detection and fault handling software schemes, show their limitations and capabilities. On the basis of this analysis, we propose original fault handling procedures, which integrate hardware and software mechanisms. Special attention is paid to exception handling and error recovery procedures. The presented solutions have been verified for a wide spectrum of applications running on IBM PC environment.

PL

W artykule przedstawiono programowe metody zwiększania odporności systemów mikroprocesorowych na błędy sprzętu. Omówiono różne techniki detekcji i tolerowania błędów, ich ograniczenia oraz możliwości. Na bazie przeprowadzonej analizy przedstawiono oryginalne procedury obsługi błędów, które integrują mechanizmy sprzętowe i programowe. Szczególną uwagę poświęcono problemowi obsługi wyjątków i mechanizmom odtwarzania. Zaproponowane rozwiązania zostały zweryfikowane dla szerokiego spektrum aplikacji.

Słowa kluczowe

EN

on-line testing; fault detection; fault tolerance; microprocessor systems

PL

testowanie równoległe; detekcja błędów; tolerowanie błędów; systemy mikroprocesorowe

• Wydawca: Wydawnictwo Naukowe PWN SA
• Czasopismo: Kwartalnik Elektroniki i Telekomunikacji
• Rocznik: 2005
• Tom: Vol. 51, z. 2
• Strony: 291--303
• Opis fizyczny: Bibliogr. 24 poz.

Twórcy

autor

Gawkowski P.

• Institute of Computer Science, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665 Warsaw

autor

Sosnowski J.

• Institute of Computer Science, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665 Warsaw

Bibliografia

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