Peripheral cells design for low suply current CMOS ASIC

• Autorzy: Ładziak D. , Podmiotko W. , Szymański A. , Kurjata-Pfitzner E. , Grodner M.
• Konferencja: Mixed Design of Integrated Circuits and Systems. 5 International Conference MIXDES' 98 (18-20.06.1998 ; Łódź, Poland)
• Języki publikacji: EN

Abstrakty

EN

Some new solutions featuring very low current consumption in stand-by mode for the specialized circuit are proposed. The supply current of RC oscillatorn does not exceed 20 μA at 5 V, power on reset circuit consumens less than 3 μA. The input pull-up cell with high immunity to noise coupled by pins capacitances drains no more than 300 nA. These solutions were implemented in the multifonction decoder circuit realized using CMOS 1.2 μm process and 5 V supply voltage.

• Wydawca: Institute of Electron Technology
• Czasopismo: Electron Technology
• Rocznik: 1999
• Tom: Vol. 32, No. 3
• Strony: 251--255
• Opis fizyczny: Bibliogr. 3 poz.

Twórcy

autor

Ładziak D.

autor

Podmiotko W.

autor

Szymański A.

autor

Kurjata-Pfitzner E.

autor

Grodner M.

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warszawa, Poland,