Properties of bilinear SI intergrators composed of a complementary memory cell

• Autorzy: Handkiewicz A. , Śniatała P. , Łukowiak M. , Kropidłowski M.
• Konferencja: Mixed Design of Integrated Circuits and Systems. 5 International Conference MIXDES' 98 (18-20.06.1998 ; Łódź, Poland)
• Języki publikacji: EN

Abstrakty

EN

In this paper a new, switched current (SI) memory cell and based on this cell two kinds structures of blinear integrators are considered. Analysis of the integrators shown that parasitic effects (clock feed-through effect and gain error) can be better cancelled in the second structure than in the fabricated in order to examine the presented cells.

• Wydawca: Institute of Electron Technology
• Czasopismo: Electron Technology
• Rocznik: 1999
• Tom: Vol. 32, No. 3
• Strony: 247--250
• Opis fizyczny: Bibliogr. 3 poz.

Twórcy

autor

Handkiewicz A.

autor

Śniatała P.

autor

Łukowiak M.

autor

Kropidłowski M.

• Faculty of Electrical Engineering, Poznań University of Technology, ul. Piotrowo 3a, 60-965 Poznań, Poland,