Analysis of capacitor errors in FPAA chip type MPAA020

• Autorzy: Dąbrowski A. , Spitz M.
• Konferencja: Mixed Design of Integrated Circuits and Systems. 5 International Conference MIXDES' 98 (18-20.06.1998 ; Łódź, Poland)
• Języki publikacji: EN

Abstrakty

EN

In this paper we present the measurement procedures and the analysis of capacitor errors in Motorola's field programmable analog array (FPAA) type MPAA 020. This modern programmable chip makes it possible to realize different switched-capacitor (SC) circuits for application in analog signal processing. It is well known that performance of SC circuits depends, first of all, on the precision of particular capacitance ratios. These ratios can be very exactly contrilled in standard (application specific) integrated circuits (ASIC's) implemented, e.g., in CMOS technology. In result, integrated SC circuits have become very popular for most signal processing applications Our goal is to shown that not only ASIC's but also general-purpose programmable circuits, e.g. the mentioned FPAA, are suitable for the realization of precise SC systems for signal processing. It is therefore very important to analyse errors of capacitors and capacitance ratios in the FPAA chip and to show that they can be approximately as small as those obtainable using the SC application specific counterparts. Procedures for the measurement and analysis of capacitor errors presented in this paper, consist of some correction steps performed in order to compensate for other error sources than the capacitor errors and to elminate these irrelevant error components from the final results.

• Wydawca: Institute of Electron Technology
• Czasopismo: Electron Technology
• Rocznik: 1999
• Tom: Vol. 32, No. 3
• Strony: 234--239
• Opis fizyczny: Bibliogr. 7 poz.

Twórcy

autor

Dąbrowski A.

autor

Spitz M.

• Institute of Electronic and Telecomunication, Poznań Universuty of Technology, ul. Piotrowo 3a, 60-965 Poznań, Poland,