Rapid Prototyping of Third-Order Sigma-Delta A/D Converters

• Autorzy: Suszyński R. , Wawryn K.
• Konferencja: International Conference on Signals and Electronic Systems ICSES (18-21.09.2012) ; Wrocław, Poland
• Języki publikacji: EN

Abstrakty

EN

Prototyping ot third-order sigma-delta analog to dogital converters (ΣΔ ADCs) has been presented in the paper. The method is based on implementation of field programmable analog arrays (FPAA) to configure and reconfigure proposed circuits. Three third-order ΣΔ ADC structures have been considered. The circuit characteristics have been measured and then the structure of the converters have been reconfigured tro satisfy input specifications.

Słowa kluczowe

EN

sigma-delta converter; A/D converter; FPAA; MASH structure

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2013
• Tom: Vol. 59, No. 1
• Strony: 99--104
• Opis fizyczny: Bibliogr. 8 poz., wykr.

Twórcy

autor

Suszyński R.

• Faculty of Electronics and Computer Science, Koszalin University of Technology, ul. Śniadeckich 2, 75-453 Koszalin, Poland

autor

Wawryn K.

• Faculty of Electronics and Computer Science, Koszalin University of Technology, ul. Śniadeckich 2, 75-453 Koszalin, Poland

Bibliografia

• [1] R. Suszyński and K. Wawryn, " Prototyping of Higher Order ΣΔ ADC Based on Implementation of FPGA", in Proceedings of the International Conference on Signals and Electronic Systems, ICSES, 2012
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• [3] M. Burns and G. W. Roberts, An Introduction to Mixed-Signal IC Testing and Measurement, Oxford University Press, 2000.
• [4] H. Kutuk and S. S. Kang, "Filter design using a new field-programmable analog array (FPGA)," Analog Integrated Circuits and Signal Processing, vol. 14, pp. 81-90, 1997.
• [5] Y. Chen and K.-P. Pun, "A 0.5-V 90-dB SNDR 102 dB-SFDR audio-band continuous-time delta-sigma modulator," Analog Integrated Circuits and Signal Processing, vol. 71, pp. 159-169, 2012.
• [6] E. Bonizzoni, A. P. Percz, F. Maloberti, and M. A. Garcia-Andrade, "Two op-amps third-order sigma-delta modulator with 61-dB SNDR, 6-MHz bandwidth and 6-mW power consumption," Analog Integrated Circuits and Signal Processing, vol. 66, pp. 381-388, 2011.
• [7] H. Roh, H. Lee, Y. Choi, and J. Roh, "A 0.8-V 816-nW delta-sigma modulator for low-power biomedical applications," Analog Integrated Circuits and Signal Processing, vol. 63, pp.101-106, 2010.
• [8] K. Wawryn and R. Suszyński, "Switched current building blocks for sigma-delta modulators," in Proceedings of the 16th National Conference on Circuit Theory and Electronic Circuits, 1993, pp. 108-113.