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Abstrakty
Quantum computing and circuits are of growing interest and so is reversible logic as it plays an important role in the synthesis of quantum circuits. Moreover, reversible logic provides an alternative to classical computing machines, that may overcome many of the power dissipation problems in the near future. Some ripple-carry adders based on a do-spy-undo structure have been designed and tested reversibly. This paper presents a brief overview of the performances obtained with such chips processed in standard 0.35 um CMOS technology and used in true reversible calculation (computations are performed forwards and backwards such that addition and subtraction are made reversibly with the same chip). Adiabatic signals used are known to allow the signal energy stored on the various capacitances of the circuit to be redistributed rather than being dissipated as heat while allowing to avoid calculation errors introduced by the use of conventional rectangular pulses. Through the example of both simulations and experimental results, this paper aims at providing a base of knowledge and knowhow in physical implementation of reversible circuits.
Rocznik
Tom
Strony
205--212
Opis fizyczny
Bibliogr. 16 poz., wykr.
Twórcy
autor
autor
- Universiteit Gent, Vakgroep elektronika en informatiesystemen, Sint Pietersnieuwstraat 41, B-9000 Gent, Belgium, research@burignat.eu
Bibliografia
- [1] A. De Vos, “Lossless computing,” in Proceedings of the IEEE Workshop on Signal Processing, Poznań, Poland, 2003, pp. 7-14.
- [2] R. Feynman, “Quantum mechanical computer,” Optics News, vol. 11, pp. 11-20, 1985.
- [3] R. Landauer, “Irreversibility and heat generation in the computing process,” IBM Journal of Research and Development, vol. 5, no. 3, pp. 183-191, 1961.
- [4] C. Bennett, “Logical reversibility of computation,” IBM Journal of Research and Development, vol. 17, no. 6, pp. 525-532, 1973.
- [5] T. Toffoli, “Reversible computing,” in Automata, Languages and Programming, ser. Technical Memo MIT/LCS/TM-151, W. De Bakker and J. Van Leeuwen, Eds. Springer, Berlin: MIT Laboratory for Computer Science, 1980, pp. 632-644.
- [6] S. Burignat, “Reversible computation, a quantum-inspired lowconsumption viable technology? invited tutorial,” in IEEE Conference, Signal Processing: Algorithms, Architectures, Arrangements, and Applications (SPA 2011). Poznań, Poland: IEEE Conference, 29th-30th September 2011, pp. 9-10.
- [7] A. De Vos, “Reversible computer hardware,” Electronic Notes in Theoretical Computer Science, vol. 253, no. 6, pp. 17-22, March 2010.
- [8] M. Skoneczny, Y. Van Rentergem, and A. De Vos, “Reversible fourier transform chip,” in Proceedings of the 15th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES 2008), Poznań, Poland, June 2008 2008, pp. 281-286.
- [9] A. De Vos, S. Burignat, and M. Thomsen, “Reversible implementation of a discrete integer linear transformation,” in Proceedings of the 2nd Reversible Computation Workshop, Bremen, 2010, pp. 107-110.
- [10] S. Burignat, K. Vermeirsch, A. De Vos, and M. Thomsen, “Garbageless reversible implementation of integer linear transformations,” in Proceedings of the 4th Reversible Computation Workshop, Kopenhagen, Denmark, July 2nd-3rd 2012, pp. 187-197.
- [11] S. Cuccaro, T. Draper, D. Moulton, and S. Kutin, “A new quantum ripple-carry addition circuit,” in Proceedings of the 8th Workshop on Quantum Information Processing, Cambridge, June 2005, p. 9 pages.
- [12] V. Vedral, A. Barenco, and A. Ekert, “Quantum networks for elementary arithmetic operations,” Physical Review A, vol. 54, pp. 147-153, 1996.
- [13] E. Fredkin and T. Toffoli, “Conservative logic,” International Journal of Theoretical Physics, vol. 21, pp. 219-253, 2004.
- [14] S. Burignat and A. De Vos, “Test of a majority-based reversible (quantum) 4 bits ripple-carry adder in adiabatic calculation,” in Proceedings of the 18th International Conference “Mixed Design of Integrated Circuits and Systems” (MIXDES 2011), Gliwice, Poland, 16-18 June 2011, pp. 368-373.
- [15] A. De Vos, Reversible Computing. Wiley-VCH, Berlin, October 2010, ISBN-10: 3-527-40992-0 ISBN-13: 978-3-527-40992-1.
- [16] S. Burignat, M. Olczak, M. Klimczak, and A. De Vos, “Towards the limits of cascaded reversible (quantum-inspired) circuits,” in Reversible Computation, Proceedings, ser. Lecture Notes in Computer Science, no. 7165. Gent, Belgium: Springer-Verlag, 2012.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BWA0-0053-0019