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Synthesis of Generalised Threshold Gates and Multi Threshold Threshold Gates

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Konferencja
International Conference on System Engineering - ICSEng (21 ; 16-18.08.2011) ; Las Vegas, USA
Języki publikacji
EN
Abstrakty
EN
This paper presents synthesis algorithms for Generalised and Multi Threshold Threshold Gates. Both algorithms can be applied to generate circuit structures for arbitrary Boolean functions. We present gate's formal models, synthesis algorithms and complexity estimations of the resulting structures.
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Twórcy
autor
  • Institute of Computer Engineering, Control and Robotics, Wrocław University of Technology, Wybrzeże Wyspiańskiego 27, 50-370 Wrocław, Poland
autor
  • Institute of Computer Engineering, Control and Robotics, Wrocław University of Technology, Wybrzeże Wyspiańskiego 27, 50-370 Wrocław, Poland
autor
  • Institute of Computer Engineering, Control and Robotics, Wrocław University of Technology, Wybrzeże Wyspiańskiego 27, 50-370 Wrocław, Poland
Bibliografia
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  • [2] M. Avedillo, J. Quintana, and H. Pettenghi, “Logic Models Supporting the Design of MOBILE-based RTD Circuits,” 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP’05), pp. 254–259, 2005.
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  • [9] M. J. Avedillo, J. M. Quintana, H. Pettenghi, P. Kelly, and C. Thompson, “Multi-threshold threshold logic circuit design using resonant tunnelling devices,” Electronics Letters, vol. 39, no. 21, pp. 1502–1504, Oct. 2003.
  • [10] J. M. Quintana, M. J. Avedillo, and H. Pettenghi, “Rtd-based compact programmable gates,” in IEEE International Joint Conference on Neural Networks, July 2004, pp. 2637–2640.
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  • [12] J. I. Bergman, J. Chang, Y. Joo, B. Matinpour, J. Laskar, N. M. Jokerst, M. A. Brooke, B. Brar, and E. B. III, “RTD/CMOS nanoelectronic circuits: thin-film InP-based resonant tunneling diodes integrated with CMOS circuits,” IEEE Electron Device Letters, vol. 20, no. 3, pp. 119–122, March 1999.
  • [13] M. Bawiec and M. Nikodem, “Boolean logic function synthesis for generalised threshold gate circuits,” in Proceedings of the 46th Annual Design Automation Conference, ser. DAC ’09. New York, NY, USA: ACM, 2009, pp. 83–86.
  • [14] M. A. Bawiec and M. Nikodem, “Generalised threshold gate synthesis based on and/or/not representation of boolean function,” in Proceedings of the 2010 Asia and South Pacific Design Automation Conference, ser. ASPDAC ’10. Piscataway, NJ, USA: IEEE Press, 2010, pp. 861–866.
  • [15] M. J. Avedillo, J. M. Quintana, and H. Pettenghi, “Self-latching operation of mobile circuits using series-connection of rtds and transistors,” IEEE Transactions on Circuits and Systems, vol. 53, no. 5, pp. 334–338, May 2006.
  • [16] Y. Wei and J. Shen, “Novel universal threshold logic gate based on RTD and its application,” Microelectronics Journal, vol. 42, no. 6, pp. 851–854, 2011.
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  • [18] S. Muroga, Threshold logic and its application. John Wiley & Sons, 1971.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BWA0-0051-0047
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