Readout Electronics for Pixel Detectors in Deep Submicron and 3D Technologies

• Autorzy: Maj P. , Szczygieł R. , Gryboś P.
• Języki publikacji: EN

Abstrakty

EN

We have designed, fabricated in 90 nm technology and tested a prototype ASIC for readout of semiconductor pixel detectors for X-ray imaging applications. The 4mm x 4mm readout IC is working in single photon counting mode and contains a pixel matrix of 1280 readout channels with dimensions of 100 µm × 100 µm each. We present the architecture, the measurement results of this IC and our conclusions. To make this chip more attractive for novel experiments, we need to further increase single pixel functionality and at the same time reduce the pixel area. This leads us to the 3D technology with at least two layers: analogue and digital and additionally the sensor layer. We present the concept of the 3D hybrid pixel chip design with small pixel size and the ability to build a dead-space free large area pixel matrix.

Słowa kluczowe

EN

hybrid pixel detectors; deep submicron technology; 3D

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2011
• Tom: Vol. 57, No. 4
• Strony: 497--502
• Opis fizyczny: Bibliogr. 8 poz., il., wykr.

Twórcy

autor

Maj P.

autor

Szczygieł R.

autor

Gryboś P.

• Department of Measurement Instrumentation, AGH University of Science and Technology, Kraków, Poland,

Bibliografia

• [1] R. Szczygiel, P. Grybos, and P. Maj, “A prototype pixel readout IC for high count rate X-ray imaging systems in 90 nm CMOS technology,” IEEE Trans. Nucl. Sci., vol. 57, pp. 1664–1674, 2010.
• [2] R. Szczygiel, P. Grybos, and P. Maj, “FPDR90 - a low noise, fast pixel readout chip in 90 nm CMOS technology,” IEEE Trans. Nucl. Sci., vol. 58, no. 3, pp. 1361–1369, 2011.
• [3] X. Llopart, M. Campbell, R. Dinapoli, D. S. Segundo, and E. Pernigotti, “Medipix2: a 64-k pixel readout chip with 55-μm square elements working in single photon counting mode,” IEEE Trans. Nucl. Sci., vol. 49, no. 5, pp. 2279–2283, Oct 2002.
• [4] P. Kraft et al., “Characterization and calibration of PILATUS detectors,” IEEE Trans. Nucl. Sci., vol. 56, no. 3, pp. 758–764, June 2009.
• [5] R. Dinapoli et al., “A new family of pixel detectors for high frame rate X-ray applications,” Nucl. Instr. and Meth., vol. A617, pp. 384–864, 2010.
• [6] F. Krummenacher, “Pixel detectors with local intelligence: An IC designer point of view,” Nucl. Instr. and Meth., vol. A305, pp. 527–532, 1991.
• [7] G. Deptuch et al., “Vertically integrated circuits at Fermilab,” IEEE Trans. Nucl. Sci., vol. 57, no. 4, pp. 2178–2186, 2010.
• [8] G. Deptuch et al., “VIPIC IC - design and tests aspects of 3D pixel chip,” in IEEE NSS-MIC Conference Record, Knoxville, USA, Oct.30–Nov.6 2010, pp. 1540–43.