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A Nearly Optimal Fractional Delay Filter Design Using an Asymmetric Window

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In this paper a numerically efficient filter design method suitable for variable fractional delay (VFD) filter implementation is investigated. We propose to use a well known window method with an asymmetric window extracted from optimal filter designed beforehand. As we will demonstrate, such an approach, if additional gain correction is applied, allows for nearly optimal VFD filter design. Thus, the proposed approach combines window method simplicity with performance comparable to that of optimal filters. Efficiency of the presented technique makes it suitable for designing filters with varying delay in real time
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  • Gdańsk University of Technology, Faculty of Electronics, Telecommunications and Informatics, Department of Teleinformation Networks, 11/12 Gabriela Narutowicza Street, 80-233 Gdańsk, Poland, maciej.sac@eti.pg.gda.pl
Bibliografia
  • [1] G. Watkins, “Optimal Farrow Coefficients for Symbol Timing Recovery,” IEEE Communications Letters, vol. 5, no. 9, pp. 381–383, 2001.
  • [2] K. Rajamani, Y. S. Lai, and C. W. Farrow, “An Efficient Algorithm for Sample Rate Conversion from CD to DAT,” IEEE Signal Processing Letters, vol. 7, no. 10, pp. 288–290, 2000.
  • [3] P. Kroon and B. S. Atal, “Pitch Prediction with High Temporal Resolution,” in Proceedings of IEEE International Conference Acoustics Speech Signal Processing (ICASSP-90), vol. 2, Albuquerque, New Mexico, April 3–6 1990, pp. 661–664.
  • [4] V. Valimaki, “Discrete-Time Modeling of Acoustic Tubes Using Fractional Delay Filters,” in Thesis for the degree of Doctor of Technology. Helsinki University of Technology, Faculty of Electrical Engineering (now Department of Electrical and Communications Engineering), Laboratory of Acoustics and Audio Signal Processing, December 18 1995.
  • [5] J. O. Smith and B. Friedlander, “Estimation of Multipath Delay,” in Proceedings of the International Conference on Acoustics Speech and Signal Processing, San Diego, 1984, pp. 15.9.1–15.9.4.
  • [6] T. I. Laakso, V. Valimaki, M. Karjalainen, and U. K. Laine, “Splitting the Unit Delay,” IEEE Signal Processing Magazine, vol. 13, no. 1, pp. 30–60, 1996.
  • [7] M. Sac and M. Blok, “Gain Deficit Effect in the Fractional Delay Filter Design by the Window Method,” Proceedings of SPIE, vol. 7502, 2009, 75021G.
  • [8] D. F. Elliot, Handbook of Digital Signal Processing. New York: Academic Press, 1987.
  • [9] V. K. Madisetti and D. B. Williams, The Digital Signal Processing Handbook. CRC Press in cooperation with IEEE Press, 1998.
  • [10] M. Blok, “Gain Correction for Nearly Optimal Variable Fractional Sample Delay Filter Design,” Poznań, Poland, 2011, accepted for presentation at Signal Processing: Algorithms, Architectures, Arrangements, and Applications Scientific Conference, SPA.
  • [11] M. Blok, “On Practical Aspects of Optimal FSD Filter Design Using Extracted Window Method,” Link¨oping, Sweden, 2011, accepted for presentation at European Conference on Circuit Theory and Design, ECCTD.
  • [12] M. Blok, “Properties of Windows Extracted from Fractional Delay Filters Optimal in Chebyshev Sense,” in XIV Poznańskie Warsztaty Telekomunikacyjne, PWT, Poznań, December 10 2010.
  • [13] E. Hermanowicz, “A Nearly Optimal Variable Fractional Delay Filter with Extracted Chebyshev Window,” in IEEE International Conference on Electronics, Circuits and Systems, vol. 2, Lisboa, Portugal, 1998, pp. 401–404.
  • [14] E. Hermanowicz and M. Blok, “Iterative Technique for Approximate Minimax Design of Complex Digital FIR Filters,” in ICECS International Conference on Electronics, Circuits and Systems, vol. 1, Jouneih, Lebanon, December 17–20 2000, pp. 83–86.
  • [15] M. M. J. Yekta, “Half-band FIR Fractional Delay Filters with Closedform Coefficient Formulas and Modular Implementation Based on Lagrange Interpolators,” Signal Processing, vol. 88, pp. 2913–2916, December 2008.
  • [16] M. Lang and T. I. Laakso, “Simple and Robust Method for the Design of Allpass Filters Using Least-squares Phase Error Criterion,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 41, no. 1, pp. 40–48, January 1994.
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Bibliografia
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bwmeta1.element.baztech-article-BWA0-0051-0007
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