Large Data Stream Processing : Embedded Systems Design Challenges

• Autorzy: Handzlik A. , Jabłonski A.
• Języki publikacji: EN

Abstrakty

EN

The following paper describes an application of reconfigurable hardware architectures for processing of huge data streams. Radar, sonar and high speed internet networks are typical sources of data that require extreme computing power and resources to enable real time acquisition, processing and management. An approach to monitoring of real time multi-gigabit internet network has been described as a practical application of FPGA based board, designed for fast data processing.

Słowa kluczowe

EN

reconfigurable hardware; system on chip; digital signal processing; embedded system

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2010
• Tom: Vol. 56, No. 2
• Strony: 107--110
• Opis fizyczny: Bibliogr. 5 poz.

Twórcy

autor

Handzlik A.

autor

Jabłonski A.

• Microtech International S.A., Wołoska 20, 51-116 Wrocław, Poland,

Bibliografia

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• [2] D. Barbara, N. Wu, and S. Jajodia, “Detecting novel network intrusions using Bayes estimators”, In Proc. the First SIAM Int. Conf. on Data Mining (SDM 2001), Chicago. Society for Industrial and Applied Mathematics (SIAM), 2001.
• [3] W. Lu and I. Traore, “Detecting new forms of network intrusion using genetic programming, Computational Intelligence, vol. 20, No. 3, 2004.
• [4] G. Shafer, A Mathematical Theory of Evidence, Princeton University Press, Princeton, 1976.
• [5] A. Skotarczyk and A. Chorazyczewski, “FastMatch System – semantic integration of threat detection methods in networks at high transmission