Petri Nets Mapping into Reconfigurable Logic Controllers

Adamski, M.; Węgrzyn, M.

Artykuł - szczegóły

Tytuł artykułu

Petri Nets Mapping into Reconfigurable Logic Controllers

Autorzy

Adamski M. , Węgrzyn M.

Wybrane pełne teksty z tego czasopisma

http://ijet.pl/index.php/ijet

Identyfikatory

Warianty tytułu

Konferencja

Digital Control Units Design ; 6.03.2009 ; Zielona Góra, Poland

Języki publikacji

Abstrakty

The paper concentrates on the behavioral specification of Reconfigurable Logic Controller programs, given initially as Petri nets and later rewritten in Hardware Description Languages. The rule-based textual language input makes it possible to integrate the design system with existing formal logic based computer-based theorem proovers. The Petri net description in HDL provides the opportunity to integrate existing Petri net software with several commercial systems. Different Petri net places encoding methods are also discussed. Verilog-HDL is used for an intermediate representation of controller behavior on top of existing commercial synthesis tools. The implementation methods using D, JK and T flip-flops are presented.

Słowa kluczowe

logic controller Petri net programmable logic FPGA HDL VHDL Verilog place encoding modeling synthesis PNSF2

Wydawca

Polish Academy of Sciences, Committee of Electronics and Telecommunication

Czasopismo

Electronics and Telecommunications Quarterly

Rocznik

2009

Tom

Vol. 55, No 2

Strony

157--182

Opis fizyczny

Bibliogr. 79 poz., tab., wykr.

Twórcy

autor

Adamski M.

autor

Węgrzyn M.

University of Zielona Góra, Institute of Computer Engineering and Electronics, ul. Podgórna 50, 65-246 Zielona Góra, M.Adamski@iie.uz.zgora.pl ; M.Wegrzyn@iie.uz.zgora.pl

Bibliografia

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