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Abstrakty
In this paper a new non-linear error detection code with three non-linear check bits and an even number of k information bits is introduced. The proposed code may be considered as a modified parity code. The parity bit is split into two non-linear check bits and a third non-linear check bit is added. All odd errors are detected with certainty. All (also even) errors of arbitrary multiplicity for which at least one of the information bits is correct are detected with a probability greater than or equal to 1/2.
Słowa kluczowe
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Czasopismo
Rocznik
Tom
Strony
109--115
Opis fizyczny
bibliogr. 6 poz. wykr.
Twórcy
autor
autor
- Universität Potsdam, Institut für Informatik, August-Bebel-Strasse 89, 14482 Potsdam, Germany, mgoessel@cs.uni-potsdam.de
Bibliografia
- [1] Sogomonyan, E., Design of Built-in Self-Checking Monitoring Circuits for Combinational Devices, Automation and Remote Control, vol. 35, no. 2, pp. 280-289,1974.
- [2] Lin, S. and Costello, D., Error Control Coding, Prentice Hall, Englewood Cliffs, 1983.
- [3] Peterson, W. and Weldon, E., Error correcting Codes, MIT Press, Cambridge,MA, 1972.
- [4] Mac Williams, F. and Sloane, N., The Theory of Error Correcting Codes, Elsevier Publ., first edition 1977.
- [5] Rao, T. and Fujiwara, E., Error Control Coding for Computer Systems, Prentice Hall, Englewood Cliffs, 1989.
- [6] Karpovsky, M. and Taubin, A., New Class of Nonlinear Systematic Error Detecting Codes, IEEE Trans. Information Theory, vol. 50, no. 8, pp. 1818-1820, 2004
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BUS5-0015-0042