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The performance of modern multiprocessor systems is often limited by the delays of interconnections or long latencies of memory subsystems. Instruction-level multithreading is a technique to tolerate such long latencies by switching from one instruction thread to another and continuing instruction execution concurrently with the long-latency operations. Using timed Petri net models, the paper analyzes performance limitations introduced by different components of distributed-memory multithreaded multiprocessor systems. Simulation results are used to compare performance improvements obtained by replicating critical components of the system to those obtained using components with better performance characteristics.
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Rocznik
Tom
Strony
223--241
Opis fizyczny
wykr., bibliogr. 26 poz.
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autor
- Department of Computer Science Memorial University of Nfld St.John's, Canada AIB 3X5, wlodek@cs.mun.ca
Bibliografia
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Bibliografia
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bwmeta1.element.baztech-article-BUS2-0004-0011