An analog linear SVM image classifier

• Autorzy: Festila L. , Szolga L. A. , Groza R. , Hintea S. , Cirlugea M.
• Języki publikacji: EN

Abstrakty

EN

A linear Support Vector machine classifier is proposed in this paper. In such SVM architectures based on multiplying laws the main building blocks are multipliers. We propose in this paper multiplying and weighting cells, developed by using a model consisting of a compound of two inverse non-linear functions. This procedure is suitable for VLSI implementation because it permits the use of simple nonlinearized standard log-domain or DA cells that compensate each other nonlinearities to obtain an extended domain of operation. Current-mode ELIN (externally linear internally nonlinear) design is used for its low voltage, low power and high speed characteristics. The resulted parallel-serial classifier was simulated taking into account real parameters of transistors in BICMOS technology.

Słowa kluczowe

EN

support vector machine (SVM); analog multipliers; log-domain th domain; square-root domain; image classifier

• Wydawca: Łukasiewicz Industrial Research Institute for Automation and Measurements PIAP
• Czasopismo: Journal of Automation Mobile Robotics and Intelligent Systems
• Rocznik: 2009
• Tom: Vol. 3, No. 2
• Strony: 82--87
• Opis fizyczny: Bibliogr. 11 poz., rys.

Twórcy

autor

Festila L.

autor

Szolga L. A.

autor

Groza R.

autor

Hintea S.

autor

Cirlugea M.

• Basis of Electronics Department, Technical University of Cluj-Napoca. E-mails: G.Baritiu 26-28 Street, Romania,

Bibliografia

• [1] Genov R., Chakrabartty S., and Cauwenberghs G., “Silicon support vector machine with on-line learning”, Int. J. Pattern Recognition Artificial Intell., vol. 17, no. 3, 2003, pp. 385-404.
• [2] Tzividis Y., “Externally Linear, Time Invariant Systems and Their Application to Companding Signal Processing”,IEEE Trans. on CS II, vol 44, no. 2, Feb. 1997, pp. 65-84.
• [3] Gordan M.,Doctoral Thesis: Applications of the Fuzy technics and the SVMs in the image processing (in Romanian), Technical University of Cluj-Napoca, 2004.
• [4] Joachims T., Support Vector and Kernel Methods, Cornell University, Computer Science Department, SIGIR, 2003.
• [5] Festila L., Groza R., Szolga L., Hintea S., “Log-Domain multipliers for VLSI architectures”,Scientific Bulletin of the “Politechnica” University of Timisoara, Timisoara, September 2006, pp. 121-125.
• [6] Groza R., Festila L., Fazakas A.,A Log-Domain Sum-ming-Amplifier for Serial Signal Flows . Inter-Ing 2007, Tîrgu-Mures, IV 4-1IV4-4,15 -16 November 2007.
• [7] Dominguez-Castro T., Rodriguez-Vazquez A., Huertas J.L., “High resolution CMOS current comparators”. In: Proc. 1992 European Solid State Circuits Conf., 1992, pp. 242-245.
• [8] Joachims T., SVM Light Version: 6.01, University of Dortmund, Informatik, AI-Unit, 02.09.2004.
• [9] http://en.wikipedia.org/wiki/Support_vector_machines
• [10] Festila L., Szolga L., Cirlugea M., Groza R., “Analog Multiplying/Weighting VLSI Cells for SVM Classifiers”, International Conference on Knowledge-Based and Intelligent Information & Engineering Systems , ISSN 3029743, Zagreb, Croatia, 2008.
• [11] Groza R., Festila L., Sorin H., Cirlugea M.., “Log-Domain binary SVM image classifier”, International Conference on Knowledge-Based and Intelligent Information & Engineering Systems , ISSN 3029743, Zagreb, Croatia, 2008.